WO2007079277A3 - Manufacturing method and device for making an in-mold circuit comprising a chip - Google Patents

Manufacturing method and device for making an in-mold circuit comprising a chip Download PDF

Info

Publication number
WO2007079277A3
WO2007079277A3 PCT/US2006/060442 US2006060442W WO2007079277A3 WO 2007079277 A3 WO2007079277 A3 WO 2007079277A3 US 2006060442 W US2006060442 W US 2006060442W WO 2007079277 A3 WO2007079277 A3 WO 2007079277A3
Authority
WO
WIPO (PCT)
Prior art keywords
circuit
wire
poly
chip
poly sheet
Prior art date
Application number
PCT/US2006/060442
Other languages
French (fr)
Other versions
WO2007079277A2 (en
Inventor
Andre Cote
Detlef Duschek
Original Assignee
Checkpoint Systems Inc
Andre Cote
Detlef Duschek
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Checkpoint Systems Inc, Andre Cote, Detlef Duschek filed Critical Checkpoint Systems Inc
Priority to AU2006332590A priority Critical patent/AU2006332590B2/en
Priority to JP2008539151A priority patent/JP4762317B2/en
Priority to CA2628566A priority patent/CA2628566C/en
Priority to EP06849032.5A priority patent/EP1952315B1/en
Priority to CN2006800501954A priority patent/CN101351815B/en
Publication of WO2007079277A2 publication Critical patent/WO2007079277A2/en
Publication of WO2007079277A3 publication Critical patent/WO2007079277A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07718Constructional details, e.g. mounting of circuits in the carrier the record carrier being manufactured in a continuous process, e.g. using endless rolls
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
    • GPHYSICS
    • G08SIGNALLING
    • G08BSIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B13/00Burglar, theft or intruder alarms
    • G08B13/22Electrical actuation
    • G08B13/24Electrical actuation by interference with electromagnetic field distribution
    • G08B13/2402Electronic Article Surveillance [EAS], i.e. systems using tags for detecting removal of a tagged item from a secure area, e.g. tags for detecting shoplifting
    • G08B13/2428Tag details
    • G08B13/2437Tag layered structure, processes for making layered tags
    • G08B13/244Tag manufacturing, e.g. continuous manufacturing processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67132Apparatus for placing on an insulating substrate, e.g. tape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/79Apparatus for Tape Automated Bonding [TAB]
    • H01L2224/7965Means for transporting the components to be connected
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30105Capacitance
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49158Manufacturing circuit on or in base with molding of insulated base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49158Manufacturing circuit on or in base with molding of insulated base
    • Y10T29/4916Simultaneous circuit manufacturing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/14Layer or component removable to expose adhesive

Abstract

A poly sheet continuously moving in a machine direction is heated to a temperature just below its glass thermal temperature to make the poly malleable. A circuit (e.g., RFID chip, EAS chip, transponder, IC) is placed on the poly sheet and embedded into the poly sheet, preferably with a heat resistant soft (e.g., rubber) roller that presses the circuit into the poly without breaking the circuit. A conductive strip or wire may be applied on or into the poly sheet to align with connection points (e.g., conductive bumps) of the circuit for conductive communication with the circuit. The conductive strip or wire is preferably cut to form gaps that are nonconductive between the cut sections of wire to avoid shorting of the circuit and/or allow the conductive strip or wire to function as an antenna for the circuit, and thus to form a chip strap or tag. The poly sheet thus provides a protective womb or shield for the circuit and wire.
PCT/US2006/060442 2005-11-02 2006-11-01 Manufacturing method and device for making an in-mold circuit comprising a chip WO2007079277A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
AU2006332590A AU2006332590B2 (en) 2005-11-02 2006-11-01 Manufacturing method and device for making an in-mold circuit comprising a chip
JP2008539151A JP4762317B2 (en) 2005-11-02 2006-11-01 In-mold chip mounting
CA2628566A CA2628566C (en) 2005-11-02 2006-11-01 In-mold chip attach
EP06849032.5A EP1952315B1 (en) 2005-11-02 2006-11-01 Manufacturing method and device for making an in-mold circuit comprising a chip
CN2006800501954A CN101351815B (en) 2005-11-02 2006-11-01 Manufacturing method and device for making an in-mold circuit comprising a chip

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US73289805P 2005-11-02 2005-11-02
US60/732,898 2005-11-02
US74446106P 2006-04-07 2006-04-07
US60/744,461 2006-04-07
US11/554,237 2006-10-30
US11/554,237 US7621043B2 (en) 2005-11-02 2006-10-30 Device for making an in-mold circuit

Publications (2)

Publication Number Publication Date
WO2007079277A2 WO2007079277A2 (en) 2007-07-12
WO2007079277A3 true WO2007079277A3 (en) 2008-03-20

Family

ID=37996719

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/060442 WO2007079277A2 (en) 2005-11-02 2006-11-01 Manufacturing method and device for making an in-mold circuit comprising a chip

Country Status (7)

Country Link
US (1) US7621043B2 (en)
EP (1) EP1952315B1 (en)
JP (1) JP4762317B2 (en)
CN (1) CN101351815B (en)
AU (1) AU2006332590B2 (en)
CA (1) CA2628566C (en)
WO (1) WO2007079277A2 (en)

Families Citing this family (12)

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Publication number Priority date Publication date Assignee Title
US8123896B2 (en) * 2004-06-02 2012-02-28 Semiconductor Energy Laboratory Co., Ltd. Laminating system
TWI311358B (en) * 2005-11-16 2009-06-21 Advanced Semiconductor Eng Flip-chip integrated circuit packaging method
FR2901041B1 (en) * 2006-05-12 2008-10-10 Eric Heurtier LABEL INTEGRATING RF ANTENNA ANTENNA AND UHF RFID CARRIER
HK1109708A2 (en) * 2007-04-24 2008-06-13 On Track Innovations Ltd Interface card and apparatus and process for the formation thereof
WO2009060425A2 (en) * 2007-11-08 2009-05-14 On Track Innovations Ltd. Electronic interface apparatus and method and system for manufacturing same
FR2917895B1 (en) * 2007-06-21 2010-04-09 Commissariat Energie Atomique METHOD FOR MANUFACTURING AN ASSEMBLY OF MECHANICALLY CONNECTED CHIPS USING A FLEXIBLE CONNECTION
US8094027B2 (en) 2007-12-19 2012-01-10 Abbott Laboratories Method for molding an object containing a radio frequency identification tag
US20100301005A1 (en) * 2009-05-29 2010-12-02 Nilsson Peter L J Method of Manufacturing an Electrical Circuit on a Substrate
US20100301006A1 (en) * 2009-05-29 2010-12-02 Nilsson Peter L J Method of Manufacturing an Electrical Component on a Substrate
DE102009056122A1 (en) * 2009-11-30 2011-06-01 Smartrac Ip B.V. Method for contacting a chip
DE112016007152B4 (en) * 2016-08-17 2024-02-01 Mitsubishi Electric Corporation Method for producing a plate-shaped solder and manufacturing device
DE102018005568A1 (en) * 2018-07-13 2020-01-16 Mühlbauer Gmbh & Co. Kg Device and method for producing RFID transponders with a sliding surface

Citations (4)

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Publication number Priority date Publication date Assignee Title
US5708419A (en) * 1996-07-22 1998-01-13 Checkpoint Systems, Inc. Method of wire bonding an integrated circuit to an ultraflexible substrate
US20020152604A1 (en) * 2001-04-23 2002-10-24 Debraal John Charles Method and system for forming electrically conductive pathways
US20050093172A1 (en) * 2003-10-10 2005-05-05 Norihito Tsukahara Electronic circuit device, and method and apparatus for manufacturing the same
US20070102486A1 (en) * 2005-10-24 2007-05-10 Checkpoint Systems, Inc. Wire embedded bridge

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US2757443A (en) * 1953-01-21 1956-08-07 Erie Resistor Corp Method of making printed circuits
US2955351A (en) * 1954-12-28 1960-10-11 Plast O Fab Circuits Inc Method of making a printed circuit
US3990142A (en) * 1973-10-02 1976-11-09 Jerobee Industries, Inc. Circuit board, method of making the circuit board and improved die for making said board
US5144600A (en) * 1992-07-05 1992-09-01 Cheng Peter S C Arrangement for and method of waking a sleeper
US5761801A (en) * 1995-06-07 1998-06-09 The Dexter Corporation Method for making a conductive film composite
US6111506A (en) * 1996-10-15 2000-08-29 Iris Corporation Berhad Method of making an improved security identification document including contactless communication insert unit
US6308406B1 (en) * 1998-08-12 2001-10-30 Thermotrax Corporation Method for forming an electrical conductive circuit on a substrate
WO2005015477A2 (en) * 2003-08-08 2005-02-17 Shmuel Shapira Circuit forming system and method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5708419A (en) * 1996-07-22 1998-01-13 Checkpoint Systems, Inc. Method of wire bonding an integrated circuit to an ultraflexible substrate
US20020152604A1 (en) * 2001-04-23 2002-10-24 Debraal John Charles Method and system for forming electrically conductive pathways
US20050093172A1 (en) * 2003-10-10 2005-05-05 Norihito Tsukahara Electronic circuit device, and method and apparatus for manufacturing the same
US20070102486A1 (en) * 2005-10-24 2007-05-10 Checkpoint Systems, Inc. Wire embedded bridge

Also Published As

Publication number Publication date
AU2006332590A1 (en) 2007-07-12
EP1952315B1 (en) 2016-08-17
AU2006332590B2 (en) 2010-07-01
JP2009514703A (en) 2009-04-09
EP1952315A2 (en) 2008-08-06
US7621043B2 (en) 2009-11-24
CA2628566C (en) 2012-01-03
CN101351815B (en) 2011-11-16
CA2628566A1 (en) 2007-07-12
CN101351815A (en) 2009-01-21
JP4762317B2 (en) 2011-08-31
US20070098942A1 (en) 2007-05-03
WO2007079277A2 (en) 2007-07-12

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