WO2006127745A3 - Apparatus and methods for maintaining integrated circuit performance at reduced power - Google Patents

Apparatus and methods for maintaining integrated circuit performance at reduced power Download PDF

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Publication number
WO2006127745A3
WO2006127745A3 PCT/US2006/019981 US2006019981W WO2006127745A3 WO 2006127745 A3 WO2006127745 A3 WO 2006127745A3 US 2006019981 W US2006019981 W US 2006019981W WO 2006127745 A3 WO2006127745 A3 WO 2006127745A3
Authority
WO
WIPO (PCT)
Prior art keywords
performance
integrated circuit
reduced power
methods
critical path
Prior art date
Application number
PCT/US2006/019981
Other languages
French (fr)
Other versions
WO2006127745A2 (en
Inventor
Andrew Marshall
Original Assignee
Texas Instruments Inc
Andrew Marshall
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc, Andrew Marshall filed Critical Texas Instruments Inc
Priority to EP06770997A priority Critical patent/EP1886351A4/en
Priority to JP2008512612A priority patent/JP2008541492A/en
Publication of WO2006127745A2 publication Critical patent/WO2006127745A2/en
Publication of WO2006127745A3 publication Critical patent/WO2006127745A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/021—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in voltage or current generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C2029/5002—Characteristic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Apparatus and methods are provided for maintaining performance of an integrated circuit (11) at a reduced power. The apparatus and methods employ a performance monitor that generates a signal indicative of at least one performance characteristic of at least a portion of a critical path (14) associated with the integrated circuit. The apparatus further comprises a supply control that adjusts a supply voltage (28) of the integrated circuit to maintain performance at a reduced power based on the signal. A temperature adjustment component (18) can be provided to adjust the signal to compensate for temperature offsets associated with performance of the performance monitor relative to performance of the critical path over different operating temperatures. A performance measurement of the performance monitor can be determined based on the concurrent triggering of the performance monitor and the critical path.
PCT/US2006/019981 2005-05-20 2006-05-17 Apparatus and methods for maintaining integrated circuit performance at reduced power WO2006127745A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP06770997A EP1886351A4 (en) 2005-05-20 2006-05-17 Apparatus and methods for maintaining integrated circuit performance at reduced power
JP2008512612A JP2008541492A (en) 2005-05-20 2006-05-17 Apparatus and method for maintaining integrated circuit performance with reduced power

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/134,172 2005-05-20
US11/134,172 US7391111B2 (en) 2005-05-20 2005-05-20 Systems and methods for maintaining performance at a reduced power

Publications (2)

Publication Number Publication Date
WO2006127745A2 WO2006127745A2 (en) 2006-11-30
WO2006127745A3 true WO2006127745A3 (en) 2007-11-22

Family

ID=37448798

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/019981 WO2006127745A2 (en) 2005-05-20 2006-05-17 Apparatus and methods for maintaining integrated circuit performance at reduced power

Country Status (5)

Country Link
US (2) US7391111B2 (en)
EP (1) EP1886351A4 (en)
JP (1) JP2008541492A (en)
CN (1) CN101180733A (en)
WO (1) WO2006127745A2 (en)

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US8762087B2 (en) * 2006-11-17 2014-06-24 Texas Instruments Incorporated Accurate integrated circuit performance prediction using on-board sensors
US7714635B2 (en) * 2007-02-06 2010-05-11 International Business Machines Corporation Digital adaptive voltage supply
US8615767B2 (en) * 2007-02-06 2013-12-24 International Business Machines Corporation Using IR drop data for instruction thread direction
US7936153B2 (en) * 2007-02-06 2011-05-03 International Business Machines Corporation On-chip adaptive voltage compensation
US8132136B2 (en) * 2007-08-06 2012-03-06 International Business Machines Corporation Dynamic critical path detector for digital logic circuit paths
US7941772B2 (en) * 2007-08-06 2011-05-10 International Business Machines Corporation Dynamic critical path detector for digital logic circuit paths
US7642864B2 (en) * 2008-01-29 2010-01-05 International Business Machines Corporation Circuits and design structures for monitoring NBTI (negative bias temperature instability) effect and/or PBTI (positive bias temperature instability) effect
US7750400B2 (en) * 2008-08-15 2010-07-06 Texas Instruments Incorporated Integrated circuit modeling, design, and fabrication based on degradation mechanisms
JP5263066B2 (en) * 2009-08-05 2013-08-14 富士通セミコンダクター株式会社 Design support program, design support apparatus, and design support method
US20110181315A1 (en) * 2010-01-25 2011-07-28 Broadcom Corporation Adaptive Device Aging Monitoring and Compensation
JPWO2012059986A1 (en) * 2010-11-02 2014-05-12 富士通株式会社 Delay measurement circuit and delay measurement method
US9021324B2 (en) * 2010-12-21 2015-04-28 Stmicroelectronics International N.V. Calibration arrangement
CN102859680A (en) 2011-02-21 2013-01-02 松下电器产业株式会社 Integrated circuit
US8689023B2 (en) * 2011-10-17 2014-04-01 Freescale Semiconductor, Inc. Digital logic controller for regulating voltage of a system on chip
US9383759B2 (en) 2014-10-07 2016-07-05 Freescale Semiconductor, Inc. Voltage monitoring system
US10248186B2 (en) 2016-06-10 2019-04-02 Microsoft Technology Licensing, Llc Processor device voltage characterization
US10310572B2 (en) * 2016-06-10 2019-06-04 Microsoft Technology Licensing, Llc Voltage based thermal control of processing device
US10209726B2 (en) 2016-06-10 2019-02-19 Microsoft Technology Licensing, Llc Secure input voltage adjustment in processing devices
US10338670B2 (en) 2016-06-10 2019-07-02 Microsoft Technology Licensing, Llc Input voltage reduction for processing devices
CN111103522B (en) * 2018-10-25 2022-04-01 创意电子股份有限公司 Chip and efficiency monitoring method
TWI734656B (en) * 2020-12-25 2021-07-21 華邦電子股份有限公司 Semiconductor memory device

Citations (3)

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US20020190283A1 (en) * 2000-03-17 2002-12-19 Katsunori Seno Power supply control device, semiconductor device and method of driving semiconductor device
US20040251484A1 (en) * 1999-09-13 2004-12-16 Masayuki Miyazaki Semiconductor integrated circuit device
US20060091385A1 (en) * 2004-11-02 2006-05-04 Texas Instruments Incorporated Selectable application of offset to dynamically controlled voltage supply

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US5013396A (en) * 1987-06-01 1991-05-07 The Regents Of The University Of Michigan Method of making an ultraminiature pressure sensor
US4967152A (en) * 1988-03-11 1990-10-30 Ultra-Probe Apparatus including a focused UV light source for non-contact measurement and alteration of electrical properties of conductors
US5994755A (en) * 1991-10-30 1999-11-30 Intersil Corporation Analog-to-digital converter and method of fabrication
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Publication number Priority date Publication date Assignee Title
US20040251484A1 (en) * 1999-09-13 2004-12-16 Masayuki Miyazaki Semiconductor integrated circuit device
US20020190283A1 (en) * 2000-03-17 2002-12-19 Katsunori Seno Power supply control device, semiconductor device and method of driving semiconductor device
US20060091385A1 (en) * 2004-11-02 2006-05-04 Texas Instruments Incorporated Selectable application of offset to dynamically controlled voltage supply

Also Published As

Publication number Publication date
US7811917B2 (en) 2010-10-12
EP1886351A4 (en) 2012-02-29
WO2006127745A2 (en) 2006-11-30
US20060263913A1 (en) 2006-11-23
US7391111B2 (en) 2008-06-24
EP1886351A2 (en) 2008-02-13
JP2008541492A (en) 2008-11-20
CN101180733A (en) 2008-05-14
US20080114568A1 (en) 2008-05-15

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