DE69232543D1 - Statischer RAM-Speicher mit abgeglichenem Widerstand in einer integrierten Schaltung - Google Patents

Statischer RAM-Speicher mit abgeglichenem Widerstand in einer integrierten Schaltung

Info

Publication number
DE69232543D1
DE69232543D1 DE69232543T DE69232543T DE69232543D1 DE 69232543 D1 DE69232543 D1 DE 69232543D1 DE 69232543 T DE69232543 T DE 69232543T DE 69232543 T DE69232543 T DE 69232543T DE 69232543 D1 DE69232543 D1 DE 69232543D1
Authority
DE
Germany
Prior art keywords
integrated circuit
static ram
matched resistance
matched
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69232543T
Other languages
English (en)
Inventor
Kuo-Hua Lee
Janmye Sung
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
AT&T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AT&T Corp filed Critical AT&T Corp
Application granted granted Critical
Publication of DE69232543D1 publication Critical patent/DE69232543D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • H10B10/12Static random access memory [SRAM] devices comprising a MOSFET load element
    • H10B10/125Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903FET configuration adapted for use as static memory cell
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903FET configuration adapted for use as static memory cell
    • Y10S257/904FET configuration adapted for use as static memory cell with passive components,, e.g. polysilicon resistors
DE69232543T 1991-12-30 1992-12-10 Statischer RAM-Speicher mit abgeglichenem Widerstand in einer integrierten Schaltung Expired - Lifetime DE69232543D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US81495191A 1991-12-30 1991-12-30

Publications (1)

Publication Number Publication Date
DE69232543D1 true DE69232543D1 (de) 2002-05-16

Family

ID=25216442

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69232543T Expired - Lifetime DE69232543D1 (de) 1991-12-30 1992-12-10 Statischer RAM-Speicher mit abgeglichenem Widerstand in einer integrierten Schaltung

Country Status (4)

Country Link
US (1) US5353245A (de)
EP (1) EP0550177B1 (de)
JP (1) JP2511628B2 (de)
DE (1) DE69232543D1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07235645A (ja) * 1993-12-29 1995-09-05 Mitsubishi Electric Corp スタティック型半導体記憶装置およびその製造方法
US5699292A (en) * 1996-01-04 1997-12-16 Micron Technology, Inc. SRAM cell employing substantially vertically elongated pull-up resistors
US5751630A (en) * 1996-08-29 1998-05-12 Micron Technology, Inc. SRAM cell employing substantially vertically elongated pull-up resistors
US5808941A (en) * 1996-01-04 1998-09-15 Micron Technology, Inc. SRAM cell employing substantially vertically elongated pull-up resistors
KR100660277B1 (ko) 2005-12-29 2006-12-20 동부일렉트로닉스 주식회사 에스램 소자 및 그 제조 방법
KR100707612B1 (ko) * 2005-12-29 2007-04-13 동부일렉트로닉스 주식회사 에스램 소자 및 그 제조 방법
US8139400B2 (en) * 2008-01-22 2012-03-20 International Business Machines Corporation Enhanced static random access memory stability using asymmetric access transistors and design structure for same

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55132055A (en) * 1979-03-30 1980-10-14 Nec Corp Mos integrated circuit
JPS57172591A (en) * 1981-04-17 1982-10-23 Toshiba Corp Read-only semiconductor storage device
JPS5916370A (ja) * 1982-07-19 1984-01-27 Toshiba Corp 半導体記憶装置
JPS59121853A (ja) * 1982-12-27 1984-07-14 Toshiba Corp 半導体装置
US4744056A (en) * 1986-02-28 1988-05-10 Advanced Micro Devices, Inc. Stable high density RAM
JP2523488B2 (ja) * 1986-04-18 1996-08-07 株式会社日立製作所 半導体記憶装置
US4794561A (en) * 1987-07-02 1988-12-27 Integrated Device Technology, Inc. Static ram cell with trench pull-down transistors and buried-layer ground plate
JP2927463B2 (ja) * 1989-09-28 1999-07-28 株式会社日立製作所 半導体記憶装置
EP0443811B1 (de) * 1990-02-19 1994-08-03 Nec Corporation Halbleiterspeichervorrichtung

Also Published As

Publication number Publication date
JPH0685207A (ja) 1994-03-25
EP0550177B1 (de) 2002-04-10
EP0550177A1 (de) 1993-07-07
JP2511628B2 (ja) 1996-07-03
US5353245A (en) 1994-10-04

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Legal Events

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8332 No legal effect for de