CN103513173B - Based on BTI proving installation and the method for testing thereof of voltage controlled oscillator - Google Patents

Based on BTI proving installation and the method for testing thereof of voltage controlled oscillator Download PDF

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CN103513173B
CN103513173B CN201210224114.5A CN201210224114A CN103513173B CN 103513173 B CN103513173 B CN 103513173B CN 201210224114 A CN201210224114 A CN 201210224114A CN 103513173 B CN103513173 B CN 103513173B
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voltage
test
measured device
temperature instability
bias temperature
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CN103513173A (en
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林殷茵
董庆
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Fudan University
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Abstract

The invention provides a kind of Bias Temperature instability (BTI) proving installation based on voltage controlled oscillator (VCO) and method of testing thereof, belong to semiconductor device reliability technical field of measurement and test.BTI proving installation of the present invention comprise measured device (DUT), ring oscillator (RO), analog voltage handover module and first oscillation period test module; Analog voltage handover module switches between voltage stress is biased and the test of BTI effect is biased for control DUT; RO comprises at least one Flow Control phase inverter, and DUT is for controlling the electric current through this Flow Control phase inverter, to such an extent as to RO and DUT forms frequency of its output signal by the voltage-controlled VCO of grid end being offset to DUT; First oscillation period test module synchronously can test the coherent signal of one-period of the output signal exporting VCO.This device has the advantage that BTI measurement sensitivity is high, measurement is accurate, test speed is fast, and circuit is simple.

Description

Based on BTI proving installation and the method for testing thereof of voltage controlled oscillator
Technical field
The invention belongs to semiconductor device reliability technical field of measurement and test, relate to Bias Temperature instability (BiasTemperatureInstability, BTI) test, be specifically related to a kind of based on voltage controlled oscillator (VoltageControlOscillator, VCO) measured device (DeviceUnderTest, DUT) is carried out to device and the method for testing thereof of BTI test.
Background technology
BTI effect (comprising negative direction Bias Temperature instability NBTI and positive dirction Bias Temperature instability PBTI) refers under uniform temperature condition, when the grid end bias voltage of metal-oxide-semiconductor, the characteristic of metal-oxide-semiconductor can be degenerated, such as, for PMOSFET, threshold voltage (V th) increase, saturation current, sub-threshold slope and be cross over mutual conductance reduce.Along with the size of device constantly reduces, one of BTI effect principal element becoming device degradation, therefore, it more and more comes into one's own.
A key character of BTI effect is exactly that it has stronger recovery Effects, such as, for PMOSFET, after being at high temperature biased to its grid end negative bias a period of time, if should be zero-bias or positive bias by negative bias, the degradation characteristics of device will have very strong recovery.Therefore, this brings a difficult problem to accurate test MOS tube device, normally, is difficult to the situation of change measuring its threshold voltage in real time.
In the BTI proving installation of prior art, in test process, be generally measure V th(identical I dunder condition) change or I d(identical V gsunder condition) change, these be all measure analog signals to reflect BTI, usually have that simulating signal is difficult to follow the tracks of, measurement sensistivity is inadequate, circuit is complicated shortcoming, and finally cause measuring inaccurate.Other also have employing digital signal to reflect the method for testing of BTI, but, be difficult to the requirement realizing above-described real-time measurement, and test circuit is complicated, is finally also difficult to the accuracy ensureing test.
In view of this, the present invention proposes a kind of novel BTI proving installation.
Summary of the invention
An object of the present invention is, simplifies the circuit structure of BTI proving installation.
An also object of the present invention is, improves the accuracy of BTI test.
For realizing above object or other objects, the invention provides a kind of BTI proving installation, it comprise measured device, ring oscillator, analog voltage handover module and first oscillation period test module; Wherein,
Described analog voltage handover module is used for carrying out switchings control based on the first control signal to the first voltage of grid end or the second voltage that are offset to described measured device, shown first voltage is the voltage making described measured device that BTI effect occur, and described second voltage is the voltage making described measured device work in subthreshold value;
Described ring oscillator comprises at least one Flow Control phase inverter, described measured device is for controlling the electric current through this Flow Control phase inverter, to such an extent as to described ring oscillator and described measured device form its frequency outputed signal at least by the voltage-controlled voltage controlled oscillator of grid end being offset to described measured device;
Described first oscillation period test module synchronously control by described first control signal, to such an extent as to the grid end of described measured device is when being switched to biased described second voltage, the coherent signal of the one-period of the output signal of described voltage controlled oscillator is exported by described first test module test oscillation period.
In one embodiment, described measured device can be NMOSFET, and described first voltage is greater than the threshold voltage of described NMOSFET, and described second voltage is less than the threshold voltage of described NMOSFET.
In another embodiment, described measured device can be PMOSFET, described first voltage is negative voltage and its absolute value is greater than the absolute value of the threshold voltage of described PMOSFET, and described second voltage is negative voltage and it is less than the absolute value of the threshold voltage of described PMOSFET.
According to the BTI proving installation of one embodiment of the invention, wherein, described ring oscillator is formed by even number first phase inverter and odd number Flow Control inverter series substantially.
Further, described Flow Control phase inverter is CMOS phase inverter, and the source/drain terminal of one of them metal-oxide-semiconductor of described measured device and described CMOS phase inverter is connected in series.
Further, the coherent signal of the one-period of the output signal of described voltage controlled oscillator is the periodic quantity of one-period.
Further, the size of the absolute value of the difference of the threshold voltage of described periodic quantity described second voltage of reflection and described measured device.
Further, when described second voltage is fixing, described periodic quantity reflects the threshold voltage variation of described measured device, the size of the BTI effect occurred when to reflect described first voltage bias further.
In the BTI proving installation of described any embodiment before, described first signal is pulse signal.
According to another aspect of the present invention, provide a kind of and use above-described BTI proving installation to carry out the method for BTI test, it comprises:
Calibration steps: before described measured device is tested, described device is placed in by with the corresponding identical alignment unit of described measured device is corresponding, at the second voltage of the multiple different size of grid end upper offset of described alignment unit, and by the periodic quantity of described first described one-period corresponding to test module each second voltage of test oscillation period, set up the relation curve formed between described second voltage and the periodic quantity of described one-period based on described second voltage and described periodic quantity;
BTI generating step: when testing described measured device, forms described voltage controlled oscillator by being placed in described device in described measured device, controls described first signal to make the grid end of measured device described in described first voltage bias;
BTI effect testing procedure: controlling described first signal to make the first voltage switching of the grid end of biased described measured device is the second voltage, meanwhile, described first signal makes first test module work oscillation period and the periodic quantity of the one-period of the output signal of the described voltage controlled oscillator of test output in real time; And
Relatively calculation procedure: the described periodic quantity obtained when described second voltage bias is compared in described relation curve the BTI effect calculating and occur with described measured device under reflecting described first voltage bias condition.
In one embodiment, when described measured device is NMOSFET, described first voltage is greater than the threshold voltage of described NMOSFET, and described second voltage is less than the threshold voltage of described NMOSFET.
In another embodiment, when described measured device is PMOSFET, described first voltage is negative voltage and its absolute value is greater than the absolute value of the threshold voltage of described PMOSFET, and described second voltage is negative voltage and it is less than the absolute value of the threshold voltage of described PMOSFET.
Further, describedly compare in calculation procedure, based on the described periodic quantity obtained when described second voltage bias, in described relation curve, correspondence calculates the second voltage, the second voltage that this is calculated with in BTI effect testing procedure the second voltage of being biased carry out mathematic interpolation, to reflect the threshold shift that described measured device produces in Bias Temperature instability effect testing procedure.
Technique effect of the present invention is, the first, and the coherent signal due to its first oscillation period exported is that digital signal is measured, and its test is accurately; The periodic quantity T of second, first oscillation period works in sub-threshold region test based on the Flow Control metal-oxide-semiconductor (also i.e. measured device) of VCO to draw, therefore, it can reflect its V enlargedly thby the change of BTI effect, measurement sensitivity is high.3rd, measured by the periodic quantity T of the first oscillation period exported VCO, can test by real-time synchronization after the first voltage is removed, test speed is fast, and its test result affects little by the recovery Effects of BTI effect, further achieves Measurement accuracy; 4th, mimic channel do not introduced by whole proving installation, and integrated circuit is simple.
Accompanying drawing explanation
From following detailed description by reference to the accompanying drawings, will make above and other object of the present invention and advantage more completely clear, wherein, same or analogous key element adopts identical label to represent.
Fig. 1 is the circuit modular structure schematic diagram of the BTI proving installation provided according to one embodiment of the invention.
Fig. 2 is periodic quantity T and the V of first oscillation period of the VCO that BTI proving installation embodiment illustrated in fig. 1 tests out measbetween relation curve.
Fig. 3 is the circuit modular structure schematic diagram of the BTI proving installation provided according to further embodiment of this invention.
Fig. 4 is the test sequence relation schematic diagram based on BTI proving installation embodiment illustrated in fig. 3.
Embodiment
Introduce below be of the present invention multiple may some in embodiment, aim to provide basic understanding of the present invention, be not intended to confirm key of the present invention or conclusive key element or limit claimed scope.Easy understand, according to technical scheme of the present invention, do not changing under connotation of the present invention, one of ordinary skill in the art can propose other implementations that can mutually replace.Therefore, following embodiment and accompanying drawing are only the exemplary illustrations to technical scheme of the present invention, and should not be considered as of the present invention all or the restriction be considered as technical solution of the present invention or restriction.
The circuit modular structure schematic diagram of the BTI proving installation provided according to one embodiment of the invention is provided.In this embodiment, BTI proving installation 100 is for testing measured device (DUT) 120, and DUT120 is NMOSFET in this example, but DUT120 is not limited to this example, it can be chosen as the device of other similar metal-oxide-semiconductor structures, such as, PMOSFET etc.
Continue as shown in Figure 1, BTI proving installation 100 mainly comprises the ring oscillator (RingOscillator) 110 formed based on multistage inverter series, and in the present invention, ring oscillator 110 and DUT120 form VCO jointly.This VCO can regulate oscillator frequency based on the transmission delay of ring oscillator 110.Ring oscillator 110 is connected to form loop to realize by odd number (being more than or equal to 3) inverter series in this embodiment.Particularly, comprise even number of inverters 112 and odd number Flow Control phase inverter 111, as shown in fig. 1, ring oscillator 110 comprises 4 phase inverters 112 and 1 Flow Control phase inverter 111, the output terminal of each phase inverter is connected to the input end of another phase inverter, and head and the tail are connected in series formation loop successively.Wherein, Flow Control phase inverter 111 specifically can be chosen as CMOS phase inverter as shown in the figure.The size of current flowing through Flow Control phase inverter 111 controls by DUT120, therefore, and the Flow Control metal-oxide-semiconductor of the Flow Control phase inverter 111 that DUT120 is also used as.
The drain terminal of one of them metal-oxide-semiconductor (M1) in Flow Control phase inverter 111 or source are connected in series in source or the drain terminal of DUT120, the source of another metal-oxide-semiconductor (M2) in Flow Control phase inverter 111 or drain terminal input voltage VDD(such as 1.2V), therefore, the grid end bias voltage of DUT120 can control flow check through the electric current of DUT120, also namely can control flow check through the electric current of Flow Control phase inverter 111.When control gate end bias voltage is to make DUT120 work in sub-threshold region, the electric current flowing through Flow Control phase inverter 111 controlled by the grid end bias voltage of DUT120, and sensitive to its reacting condition.
In another embodiment, 4 phase inverters 112 can be also CMOS phase inverter, but it does not control by DUT120.In addition, the position relationship between Flow Control phase inverter 111 and DUT120 does not limit by illustrated embodiment, and such as, in other embodiments, when DUT120 is PMOSFET, it also can be placed in above Flow Control phase inverter 111 and to contact with the source of M2 or drain terminal.
The output frequency f of the output signal of this VCO is total transmission delay of the phase inverter depending on series connection.And the voltage that the voltage-controlled end (being also grid end) of working as DUT120 inputs is less than its threshold voltage (V th) time, its electric current flow through is subthreshold current.Because subthreshold current is usually smaller, for the Flow Control phase inverter 111 that DUT120 connects, the transmission that its transmission delay is far longer than other phase inverters 112 is prolonged, now, output frequency f depends on the transmission delay of Flow Control phase inverter 111 substantially, thus the frequency that namely outputs signal of output frequency f() depend primarily on the subthreshold current flowing through DUT120, and then the subthreshold current information of DUT120 substantially can be reflected by f, and then can by f to reflect on DUT120 the grid terminal voltage information that is biased, also namely the cycle information of output frequency f can to reflect on DUT120 the grid terminal voltage information that is biased.
Continue as shown in Figure 1, BTI proving installation 100 also comprise analog voltage handover module 130 and first oscillation period test module 140.Wherein analog voltage handover module 130 its for controlling the voltage signal of the grid end being offset to DUT120, particularly, be the BTI effect of test DUT, the voltage signal being offset to the grid end of DUT120 at least needs to use V meas132 and V stress131, wherein, V stress131 is voltage stress (such as, under a certain temperature conditions) biased to the grid end of DUT in BTI test process, and in this article referred to as " the first voltage ", in this example, it selects the threshold voltage (such as 1.2V or more) being greater than DUT; V meas132 voltages for making DUT work in sub-threshold region, in this article referred to as " the second voltage ", in this embodiment, it selects the threshold voltage being less than DUT.V meas132 and V stress131 are analog voltage, and handover module 130 specifically can pass through signal (Sel) 190 and control, and such as, signal 190 can be voltage pulse signal, and when it is low level, analog voltage handover module 130 selects V stress131 and be biased on the grid end of DUT120; When signal 190 is high level, analog voltage handover module 130 selects V meas132 and be biased on the grid end of DUT120, thus realize easily switching controlling.
Meanwhile, signal 190 is also offset on first oscillation period test module 140, such as, and (now V when signal 190 is offset to high level meas132 are offset to DUT120, it is made to work in sub-threshold region), first oscillation period test module 140 synchronously to start working the relevant information of measuring first oscillation period (one-period also namely outputed signal) that VCO exports export 141, such as, the periodic quantity T that 141 are first oscillation period is exported.
Based on the DUT proving installation shown in Fig. 1 when carrying out BTI test to DUT120, first, step S910, is being biased V at DUT120 stressbefore 131, select the alignment unit identical with DUT120 structural parameters as Flow Control metal-oxide-semiconductor.The periodic quantity T of output signal described above can to reflect on DUT120 the grid terminal voltage information that is biased, therefore, equally can at the V of the different size of alignment unit upper offset meas132, correspondingly measure the periodic quantity T of multiple first oscillation period of VCO, thus can T and V be obtained measbetween relation curve.Wherein, alignment unit is not by the NMOSFET that BTI affects, and its threshold voltage is identical with DUT120.
Figure 2 shows that periodic quantity T and the V of first oscillation period of the VCO that BTI proving installation embodiment illustrated in fig. 1 tests out measbetween relation curve.In this embodiment, at different V measwhen 132, signal 190 input high level, makes analog voltage handover module 130 select V meas132, now, alignment unit works in sub-threshold region, flows through the electric current I of alignment unit and Flow Control phase inverter 111 1by V meas132 control, ︱ V th-V meas︱ is larger (owing to being biased V before stress131, V thsubstantially do not change, namely now substantially there is not BTI effect), electric current I 1less; Now, Flow Control phase inverter 111 postpones the delay being far longer than phase inverter 112, and therefore, the output frequency f of the VCO that ring oscillator 110 and alignment unit are formed is determined by the delay of Flow Control phase inverter 111, is also that the periodic quantity T of first oscillation period is by V meas(now V thsubstantially constant) determine.Therefore, at V measwhen change, according to the periodic quantity T of multiple first oscillation period of mutually required measurement, periodic quantity T and V as shown in Figure 2 can be obtained measfunction relation curve.
Further, step S920, setup test BTI effect, by signal 190 input low level (voltage pulse signal is low level), makes analog voltage handover module 130 select V stress131, now, under DUT120 is in stress biased condition.V stressthe offset time of 131 is determined by the low level time length of the voltage pulse signal of signal 190, and it specifically can select according to concrete test request to arrange.
Further, step S930, by signal 190 input high level, makes analog voltage handover module 130 select V meas132, now, DUT120 works in sub-threshold region, flows through the electric current I of DUT120 and Flow Control phase inverter 111 1by V meas132 control, ︱ V th-V meas︱ is larger, electric current I 1less; Now, Flow Control phase inverter 111 postpones the delay being far longer than phase inverter 112, and therefore, the output frequency f of the VCO that ring oscillator 110 and DUT120 are formed is determined by the delay of Flow Control phase inverter 111, also namely by ︱ V th-V meas︱ determines.
Meanwhile, after VCO starting of oscillation, signal 190 input high level control first oscillation period test module 140 to start working, test out this V soon under its condition substantially can removed in stress biased measthe periodic quantity T of first corresponding oscillation period, such as, can measure the result of the one-period of vibration in 100ns.Therefore, the recovery Effects of the BTI of DUT120 can be overcome substantially at this, and test speed is fast.
Further, step S940, according to the periodic quantity T of first oscillation period, based on the relation curve shown in Fig. 2, can draw V accordingly meas, this V measthe V biased with reality meas(the V in step S930 meas) between difference, be by V stressthe BTI effect that the 131 couples of DUT produce causes, and also namely reflects V stress131 biased after the threshold voltage V of DUT120 thside-play amount.
Comprehensive known, BTI effect can prepare to test fast to draw by the proving installation 100 of embodiment as shown in Figure 1.Coherent signal due to its first oscillation period exported is that digital signal is measured, and its test accurately; Further, the periodic quantity T of first oscillation period works in sub-threshold region test based on the Flow Control metal-oxide-semiconductor (also i.e. DUT120) of VCO to draw, therefore, it can reflect its V enlargedly thby the change of BTI effect, measurement sensitivity is high.Further, measured by the periodic quantity T of the first oscillation period exported VCO, can at V stress131 remove rear real-time synchronization has tested (within such as can reaching 100ns), and test speed is fast, and its test result affects little by the recovery Effects of BTI effect, further achieves Measurement accuracy.Meanwhile, mimic channel do not introduced by whole proving installation, and integrated circuit is simple.
It should be noted that, when changing DUT120, if the DUT after changing is identical device with the DUT before changing, such as, device prepared by same wafer, or the device prepared on same process production line, then can continue the relation curve of employing shown in Fig. 2, repeat the BTI test that namely step S920 to step S940 realizes the DUT after for replacing.Certainly, also can at change V stressafter size, repeat step S920 to step S940 and carry out different V stresstest corresponding to the BTI effect of DUT under condition.Further, if the DUT after changing is different components with the DUT before changing, need again to choose with change after the corresponding identical alignment unit of DUT, execution step S910, tests out its periodic quantity T and V measfunction relation curve.
The circuit modular structure schematic diagram of the BTI proving installation provided according to further embodiment of this invention is provided.The BTI proving installation 300 of this embodiment is substantially identical with BTI proving installation 100 test philosophy embodiment illustrated in fig. 1.In this embodiment, can test DUT array, as shown in Figure 3, DUT array 320 comprises multiple DUT unit, and each unit can be formed VCO by selection and ring oscillator 310.Similarly, ring oscillator 310 is substantially similar with the ring oscillator 110 shown in Fig. 1, it at least comprises a Flow Control phase inverter, its can with by the DUT units in series selected, thus the frequency of the output signal of the VCO of formation can be controlled by the signal of the grid end being biased in DUT unit basically.Particularly, BTI proving installation 300 can survey DUT unit according to address signal corresponding selection by address decoder as shown in the figure and storehouse converter, and therefore, the BTI proving installation 300 of this embodiment can carry out array test easily.Certainly, also can comprising alignment unit in DUT array 320, when performing above-described step S910, a certain respective alignment unit can be selected to test.
Continue as shown in Figure 3, the analog voltage handover module 330 of BTI proving installation 300 at least can realize the function of analog voltage handover module 130 as shown in Figure 1 equally.V meas132 and V stressswitching between 131 can control by signal 190 equally, and certainly, in this embodiment, signal Str/Rec can also control V recoverand V offbetween switching, wherein, V offtime biased, other not selected DUT unit are all turned off, V recovertime biased, for selected DUT unit, measure its V ththe process recovered.
Signal 190 be offset to simultaneously first oscillation period test module 340 steering logic submodule 341 on.First oscillation period test module 340 the function of function and first as shown in Figure 1 test module oscillation period 140 substantially identical.As shown in Figure 3, the output signal of the VCO substantially formed by ring oscillator 310 and DUT array 320, after level shift module 350 processes, distinguishes output control logic submodule 341 and frequency demultiplexer 360.Particularly, in this embodiment, 341 is steering logic unit, mainly state machine, according to the change of Sel signal and VCOout signal, produces the change of state, the sampling one-period of VCOout the enable of control counter unit 342 and reset; 342 is synchronous counter unit, has clearing and Enable Pin, carries out resetting or counting according to clearing and enable signal; 343 is register cells, is preserved by the numerical value of synchronous counter unit 342, resets until steering logic unit 340 produces.Frequency demultiplexer 360 exports the output frequency f_out corresponding to this VCO further.
Figure 4 shows that the test sequence relation schematic diagram based on BTI proving installation embodiment illustrated in fig. 3.Based on signal embodiment illustrated in fig. 4, reflect the test philosophy of this BTI proving installation.Wherein, Sel signal is test enable signal, starts when bias stress or after recovery a period of time the V that Sel carries out DUT unit thmeasurement.VCO outv thin test process, the oscillator signal of this VCO exports, and is all can vibrate in the whole process of high level at Sel.Counter_en is the one-period of steering logic sampling VCO, produces the pulse identical with VCO one-period, and control counter counts, and so just achieves and transfers the one-period of VCO to numerical data.CLK is clock signal, continuously effective.Data_out is that counter exports, at the effective piece count of Counter_en and Output rusults, once Counter_en is invalid, then keep result, and to remain to Sel be next time high level always, Sel is once can be reset it by steering logic modular unit 341 for high level.
Above example mainly describes BTI proving installation of the present invention and method of testing thereof.Although be only described some of them embodiments of the present invention, those of ordinary skill in the art should understand, and the present invention can implement with other forms many not departing from its purport and scope.Therefore, the example shown and embodiment are regarded as illustrative and not restrictive, when do not depart from as appended each claim define the present invention spirit and scope, the present invention may contain various amendments and replacement.

Claims (13)

1. a Bias Temperature instability test device, is characterized in that, comprise measured device, ring oscillator, analog voltage handover module and first oscillation period test module; Wherein,
Described analog voltage handover module is used for carrying out switchings control based on the first control signal to the first voltage of grid end or the second voltage that are offset to described measured device, shown first voltage is the voltage making described measured device generation Bias Temperature instability effect, and described second voltage is the voltage making described measured device work in subthreshold value;
Described ring oscillator comprises at least one Flow Control phase inverter, described measured device is for controlling the electric current through this Flow Control phase inverter, to such an extent as to described ring oscillator and described measured device form its frequency outputed signal at least by the voltage-controlled voltage controlled oscillator of grid end being offset to described measured device;
Described first oscillation period test module synchronously control by described first control signal, to such an extent as to the grid end of described measured device is when being switched to biased described second voltage, the coherent signal of the one-period of the output signal of described voltage controlled oscillator is exported by described first test module test oscillation period.
2. Bias Temperature instability test device as claimed in claim 1, it is characterized in that, described measured device is NMOSFET, and described first voltage is greater than the threshold voltage of described NMOSFET, and described second voltage is less than the threshold voltage of described NMOSFET.
3. Bias Temperature instability test device as claimed in claim 1, it is characterized in that, described measured device is PMOSFET, described first voltage is negative voltage and its absolute value is greater than the absolute value of the threshold voltage of described PMOSFET, and described second voltage is negative voltage and it is less than the absolute value of the threshold voltage of described PMOSFET.
4. Bias Temperature instability test device as claimed in claim 1, it is characterized in that, described ring oscillator is formed by even number first phase inverter and odd number Flow Control inverter series substantially.
5. Bias Temperature instability test device as claimed in claim 4, it is characterized in that, described Flow Control phase inverter is CMOS phase inverter, and the source/drain terminal of one of them metal-oxide-semiconductor of described measured device and described CMOS phase inverter is connected in series.
6. Bias Temperature instability test device as claimed in claim 1, it is characterized in that, the coherent signal of the one-period of the output signal of described voltage controlled oscillator is the periodic quantity of one-period.
7. Bias Temperature instability test device as claimed in claim 6, is characterized in that, the size of the absolute value of the difference of the threshold voltage of described periodic quantity described second voltage of reflection and described measured device.
8. Bias Temperature instability test device as claimed in claim 7, it is characterized in that, when described second voltage is fixing, described periodic quantity reflects the threshold voltage variation of described measured device, the size of the Bias Temperature instability effect occurred when to reflect described first voltage bias further.
9. Bias Temperature instability test device as claimed in claim 1, it is characterized in that, described first control signal is pulse signal.
10. use device as claimed in claim 1 to carry out a method for Bias Temperature instability test, it is characterized in that, comprising:
Calibration steps: before described measured device is tested, described device is placed in by with the corresponding identical alignment unit of described measured device is corresponding, at the second voltage of the multiple different size of grid end upper offset of described alignment unit, and by the periodic quantity of described first described one-period corresponding to test module each second voltage of test oscillation period, set up the relation curve formed between described second voltage and the periodic quantity of described one-period based on described second voltage and described periodic quantity;
Bias Temperature instability generating step: when described measured device is tested, forming described voltage controlled oscillator by being placed in described device in described measured device, controlling described first control signal to make the grid end of measured device described in described first voltage bias;
Bias Temperature instability effect testing procedure: controlling described first control signal to make the first voltage switching of the grid end of biased described measured device is the second voltage, meanwhile, described first control signal makes first test module work oscillation period and the periodic quantity of the one-period of the output signal of the described voltage controlled oscillator of test output in real time; And
Relatively calculation procedure: the described periodic quantity obtained when described second voltage bias is compared in described relation curve the Bias Temperature instability effect calculating and occur with described measured device under reflecting described first voltage bias condition.
11. methods as claimed in claim 10, it is characterized in that, when described measured device is NMOSFET, described first voltage is greater than the threshold voltage of described NMOSFET, and described second voltage is less than the threshold voltage of described NMOSFET.
12. methods as claimed in claim 10, it is characterized in that, when described measured device is PMOSFET, described first voltage is negative voltage and its absolute value is greater than the absolute value of the threshold voltage of described PMOSFET, and described second voltage is negative voltage and it is less than the absolute value of the threshold voltage of described PMOSFET.
13. methods as claimed in claim 10, it is characterized in that, describedly compare in calculation procedure, based on the described periodic quantity obtained when described second voltage bias, in described relation curve, correspondence calculates the second voltage, the second voltage that this is calculated with in Bias Temperature instability effect testing procedure the second voltage of being biased carry out mathematic interpolation, to reflect the threshold shift that described measured device produces in Bias Temperature instability effect testing procedure.
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