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Publication numberCN103513173 B
Publication typeGrant
Application numberCN 201210224114
Publication date20 Apr 2016
Filing date29 Jun 2012
Priority date29 Jun 2012
Also published asCN103513173A
Publication number201210224114.5, CN 103513173 B, CN 103513173B, CN 201210224114, CN-B-103513173, CN103513173 B, CN103513173B, CN201210224114, CN201210224114.5
Inventors林殷茵, 董庆
Applicant复旦大学
Export CitationBiBTeX, EndNote, RefMan
External Links: SIPO, Espacenet
基于压控振荡器的bti测试装置及其测试方法 Based VCO bti test device and test method translated from Chinese
CN 103513173 B
Abstract  translated from Chinese
本发明提供一种基于压控振荡器(VCO)的偏压温度不稳定性(BTI)测试装置及其测试方法,属于半导体器件可靠性测试技术领域。 Based on the present invention provides a voltage controlled oscillator (VCO) bias temperature instability (BTI) testing device and testing method, which belongs to the technical field of semiconductor device reliability testing. 本发明的BTI测试装置包括被测器件(DUT)、环形振荡器(RO)、模拟电压切换模块和第一个振荡周期测试模块;模拟电压切换模块用于控制DUT在电压应力偏置和BTI效应测试偏置之间进行切换;RO包括至少一个流控反相器,DUT用于控制经该流控反相器的电流,以至于RO与DUT形成其输出信号的频率受偏置于DUT的栅端的电压控制的VCO;第一个振荡周期测试模块能同步地测试输出VCO的输出信号的第一个周期的相关信号。 BTI test device of the present invention comprises a device under test (DUT), a ring oscillator (RO), the first analog voltage and a switching module oscillation cycle test module; analog voltage for controlling the switching module and the bias voltage stress effect the DUT BTI bias switching between the test; RO comprises at least one flow control inverter, for controlling the flow control DUT inverter current through that DUT RO is formed by the output signals of its frequency offset from the gate of the DUT the VCO control voltage terminal; a first signal related to a period of the first cycle of oscillation can be synchronized to the test module to test the output of the VCO output signal. 该装置具有BTI测试灵敏度高、测量准确、测试速度快的优点,并且电路简单。 The device has a high sensitivity BTI test, measurement accuracy, measurement speed advantage, and the circuit is simple.
Claims(13)  translated from Chinese
1.一种偏压温度不稳定性测试装置,其特征在于,包括被测器件、环形振荡器、模拟电压切换模块和第一个振荡周期测试模块;其中, 所述模拟电压切换模块用于基于第一控制信号对偏置于所述被测器件的栅端的第一电压或第二电压进行切换控制,所示第一电压为使所述被测器件发生偏压温度不稳定性效应的电压,所述第二电压为使所述被测器件工作于亚阈值的电压; 所述环形振荡器包括至少一个流控反相器,所述被测器件用于控制经该流控反相器的电流,以至于所述环形振荡器与所述被测器件形成其输出信号的频率至少地受偏置于所述被测器件的栅端的电压控制的压控振荡器; 所述第一个振荡周期测试模块同步地受所述第一控制信号控制,以至于所述被测器件的栅端被切换至偏置所述第二电压时,所述压控振荡器的输出信号的第一个周期的相关信号被所述第一个振荡周期测试模块测试输出。 A bias temperature stability test apparatus, characterized by comprising the device under test, a ring oscillator, the analog voltage and the first switching module oscillation cycle test module; wherein the analog voltage based on the switching module for a first control signal for a first bias voltage to the gate terminal of said device under test or a second switching control voltage, the first voltage is shown so that the DUT voltage bias temperature instability effect occurs, said second voltage is the voltage of the device under test operates in subthreshold; said ring oscillator comprises at least one flow control inverter, the device under test controller for controlling the flow through the inverter current , so that the ring oscillator frequency and the device under test is formed at least of its output signals to the gate terminal of the voltage controlled by the voltage controlled oscillator bias to the device under test; the first oscillation period test when the modules are supported by the first synchronization control signal, so that the gate terminal of said device under test is switched to the second bias voltage, said voltage controlled oscillator output signal related to the first cycle the first signal is a test module to test the output of the oscillation period.
2.如权利要求1所述的偏压温度不稳定性测试装置,其特征在于,所述被测器件为NMOSFET,所述第一电压大于所述NM0SFET的阈值电压,所述第二电压小于所述NM0SFET的阈值电压。 2. The bias temperature instability of a test device according to claim, characterized in that said device under test is a NMOSFET, the first voltage is greater than the threshold voltage of the NM0SFET, the second voltage is less than the the threshold voltage of said NM0SFET.
3.如权利要求1所述的偏压温度不稳定性测试装置,其特征在于,所述被测器件为PM0SFET,所述第一电压为负向电压并且其绝对值大于所述PM0SFET的阈值电压的绝对值,所述第二电压为负向电压并且其小于所述PM0SFET的阈值电压的绝对值。 3. The threshold voltage of the bias temperature instability of a test device as claimed in claim wherein said device under test is PM0SFET, the first voltage is negative and its absolute value is greater than the voltage of the PM0SFET the absolute value of the second voltage is a negative voltage and its absolute value is less than the threshold voltage of the PM0SFET.
4.如权利要求1所述的偏压温度不稳定性测试装置,其特征在于,所述环形振荡器基本由偶数个第一反相器和奇数个流控反相器串联形成。 4. The bias temperature instability of a test device according to claim, characterized in that said ring oscillator is formed substantially in series by a first inverter and an even number of an odd number of inverters flow control.
5.如权利要求4所述的偏压温度不稳定性测试装置,其特征在于,所述流控反相器为CMOS反相器,所述被测器件与所述CMOS反相器的其中一个MOS管的源端/漏端串联连接。 5. The bias temperature instability of the 4 test device as claimed in claim wherein said flow control inverter is a CMOS inverter, wherein a device under test with the CMOS inverter MOS tube source / drain terminal connected in series.
6.如权利要求1所述的偏压温度不稳定性测试装置,其特征在于,所述压控振荡器的输出信号的第一个周期的相关信号为第一个周期的周期值。 A bias temperature instability of the test device as claimed in claim wherein a first signal related to the period of said VCO output signal value of the first cycle period.
7.如权利要求6所述的偏压温度不稳定性测试装置,其特征在于,所述周期值反映所述第二电压与所述被测器件的阈值电压之差的绝对值的大小。 6 7. bias temperature instability of the test device as claimed in claim wherein, the absolute values of the period value of the threshold voltage of the second voltage and reflects the difference between the DUT.
8.如权利要求7所述的偏压温度不稳定性测试装置,其特征在于,在所述第二电压固定的情况下,所述周期值反映所述被测器件的阈值电压变化,以进一步反映所述第一电压偏置的情况下所发生的偏压温度不稳定性效应的大小。 7 8. bias temperature instability of the test device according to claim, characterized in that said second voltage is fixed, the period value reflects the change of the threshold voltage of the device under test, to further size bias temperature instability effect of the case reflects the first voltage bias occurred.
9.如权利要求1所述的偏压温度不稳定性测试装置,其特征在于,所述第一控制信号为脉冲信号。 9. A test device as claimed bias temperature instability according to claim 1, wherein said first control signal is a pulse signal.
10.—种使用如权利要求1所述的装置进行偏压温度不稳定性测试的方法,其特征在于,包括: 校准步骤:在所述被测器件被测试前,将与所述被测器件对应相同的校准单元对应置于所述装置中,在所述校准单元的栅端上偏置多个不同大小的第二电压,并通过所述第一个振荡周期测试模块测试每个第二电压对应的所述第一个周期的周期值,基于所述第二电压与所述周期值建立形成所述第二电压与所述第一个周期的周期值之间的关系曲线; 偏压温度不稳定性产生步骤:对所述被测器件进行测试时,将所述被测器件中置于所述装置中形成所述压控振荡器,控制所述第一控制信号以使所述第一电压偏置所述被测器件的栅端; 偏压温度不稳定性效应测试步骤:控制所述第一控制信号以使偏置所述被测器件的栅端的第一电压切换为第二电压,同时,所述第一控制信号使第一个振荡周期测试模块工作并实时地测试输出所述压控振荡器的输出信号的第一个周期的周期值;以及比较计算步骤:将所述第二电压偏置的情况下所得到的所述周期值在所述关系曲线中进行比较计算以反映所述第一电压偏置条件下所述被测器件发生的偏压温度不稳定性效应。 10.- kind as apparatus using a method according to claim bias temperature instability were tested, characterized in that, comprising: a calibration step of: prior to the device under test is tested with the device under test corresponding to the same calibration unit disposed corresponding to said device, the gate terminal of the second unit calibration voltage bias plurality of different sizes, and each of the test voltage through a second oscillation period of said first test module period corresponding to the value of the first period, a second voltage based on the relationship with the period value curve is formed and the second voltage value of the period between the first period; bias temperature stability generating step: when testing the device under test, the device under test is placed in said means forming said voltage controlled oscillator, said first control signal to said first control voltage biasing the gate terminal of the device under test; bias temperature instability effect measurement step of: controlling said first control signal to the bias voltage of the first gate terminal of the device under test is switched to a second voltage, and the first control signal to the first oscillation period of a test module and a test output in real time the value of the first voltage-controlled period of the cycle of the oscillator output signal; and comparing the calculated step of: said second voltage the period of a bias values calculated by comparing the obtained bias temperature instability effect at the device under test to reflect the occurrence of said first condition of said bias voltage dependence curve.
11.如权利要求10所述的方法,其特征在于,所述被测器件为NMOSFET时,所述第一电压大于所述NM0SFET的阈值电压,所述第二电压小于所述NMOSFET的阈值电压。 11. The method of claim 10, wherein, when the device under test as NMOSFET, the first voltage is greater than the threshold voltage of the NM0SFET, the second voltage is less than the threshold voltage of the NMOSFET.
12.如权利要求10所述的方法,其特征在于,所述被测器件为PM0SFET时,所述第一电压为负向电压并且其绝对值大于所述PM0SFET的阈值电压的绝对值,所述第二电压为负向电压并且其小于所述PM0SFET的阈值电压的绝对值。 12. The method according to claim 10, characterized in that said device under test is PM0SFET when said first voltage is a negative voltage whose absolute value is greater than the absolute value and the threshold voltage of the PM0SFET, the the second voltage is a negative voltage and its absolute value is less than the threshold voltage of the PM0SFET.
13.如权利要求10所述的方法,其特征在于,所述比较计算步骤中,基于所述第二电压偏置的情况下所得到的所述周期值,在所述关系曲线中对应计算得出第二电压,将该计算得出的第二电压与在偏压温度不稳定性效应测试步骤中所偏置的第二电压进行差值计算,以反映所述被测器件在偏压温度不稳定性效应测试步骤中产生的阈值偏移。 13. The method of claim 10, wherein the step period value based on the case where the second bias voltage obtained by the comparison, the corresponding relation in the calculated curve a second voltage, the second voltage and the calculated second voltage bias temperature instability effect at the test step is performed offset difference calculating, the device under test to reflect the bias temperature threshold effect stability test step generated offset.
Description  translated from Chinese
基于压控振荡器的BTI测试装置及其测试方法 Based VCO BTI test device and test method

技术领域 TECHNICAL FIELD

[0001]本发明属于半导体器件可靠性测试技术领域,涉及偏压温度不稳定性(BiasTemperature Instability,BTI)的测试,具体涉及一种基于压控振荡器(Voltage ControlOscillator,VC0)对被测器件(Device Under Test,DUT)进行BTI测试的装置及其测试方法。 [0001] The present invention belongs to the technical field of semiconductor device reliability testing, involving bias temperature instability (BiasTemperature Instability, BTI) testing, in particular to a VCO (Voltage ControlOscillator, VC0) based on the device under test ( device Under test, DUT) test method and an apparatus BTI testing.

背景技术 Background technique

[0002 ] BTI效应(包括负方向偏压温度不稳定性NBTI和正方向偏压温度不稳定性I3BTI)是指在一定温度条件下、在MOS管的栅端偏置电压时,MOS管的特性会发生退化,例如,对于PM0SFET,阈值电压(Vth)增加,饱和电流、亚阈值斜率和跨到跨导减小。 [0002] BTI effects (including negative bias temperature instability NBTI direction and the positive direction of the bias temperature instability I3BTI) is under certain temperature conditions, at the end of the MOS transistor gate bias voltage characteristics of MOS tube will degraded, for example, for PM0SFET, the threshold voltage (Vth) increases saturation current, subthreshold slope and reduced transconductance to cross. 随着器件的尺寸不断缩小,BTI效应成为器件退化的主要因素之一,因此,其越来越受到重视。 As device dimensions continue to shrink, BTI has become one of the main factors effect device degradation, and therefore its more and more attention.

[0003] BTI效应的一个重要特征就是其具有较强的恢复效应,例如,对于PM0SFET,在高温下对其栅端偏置负偏压一段时间后,如果将负偏压该为零偏压或正偏压,器件的退化特性将有很强的恢复。 [0003] An important feature is its effect BTI with a strong recovery effect, for example, for PM0SFET, at a high temperature to its gate terminal biased negative bias for some time, if the zero bias or a negative bias positive bias, the degradation characteristics of the device would have a strong recovery. 因此,这给准确测试MOS管器件的带来难题,通常地,难以实时地测量其阈值电压的变化情况。 Therefore, this gives an accurate test device brings problems MOS transistor, generally, it is difficult to measure in real time the changes of the threshold voltage.

[0004]现有技术的BTI测试装置中,在测试过程中,一般是测量Vth(相同Id条件下)的变化或Id(相同Vgs条件下)的变化,这些均是测量模拟信号来反映BTI,通常具有模拟信号难以跟踪、测量灵敏度不够、电路复杂的缺点,并最终导致测量不准确。 [0004] BTI testing apparatus in the prior art, during testing, is typically measured Vth (Id under the same conditions) or changes in Id (Vgs under the same conditions) changes, which are analog measurements to reflect the BTI, typically an analog signal difficult to track, measurement sensitivity is not enough, the shortcomings of circuit complexity, and ultimately lead to inaccurate measurements. 其他也有采用数字信号来反映BTI的测试方法,但是,难以实现以上所述的实时测量的要求,并且,测试电路复杂,最终也难以保证测试的准确度。 There are also other digital signal to reflect the test method of BTI, however, difficult to achieve real-time measurement of the above requirements, and the test circuit complexity, ultimately difficult to ensure accuracy of the test.

[0005]有鉴于此,本发明提出一种新型的BTI测试装置。 [0005] In view of this, the present invention provides a novel BTI testing device.

发明内容 SUMMARY

[0006]本发明的目的之一在于,简化BTI测试装置的电路结构。 One object of the [0006] present invention is to simplify the circuit configuration of the test device BTI.

[0007]本发明的还一目的在于,提高BTI测试的准确度。 Still another object of the [0007] The present invention is to improve the accuracy of BTI test.

[0008]为实现以上目的或者其他目的,本发明提供一种BTI测试装置,其包括被测器件、环形振荡器、模拟电压切换模块和第一个振荡周期测试模块;其中, [0008] To achieve the above objects or other objects, the present invention provides a test apparatus BTI, which comprises a device under test, a ring oscillator, the analog voltage and the first switching module oscillation cycle test module; wherein,

[0009]所述模拟电压切换模块用于基于第一控制信号对偏置于所述被测器件的栅端的第一电压或第二电压进行切换控制,所示第一电压为使所述被测器件发生BTI效应的电压,所述第二电压为使所述被测器件工作于亚阈值的电压; [0009] The analog voltage switching module based on the first control signal for a first bias voltage to the gate terminal of said device under test or a second switching control voltage, as shown in the first to make the measured voltage BTI effects device generation voltage, the second voltage is the voltage of the device under test operates in subthreshold;

[0010]所述环形振荡器包括至少一个流控反相器,所述被测器件用于控制经该流控反相器的电流,以至于所述环形振荡器与所述被测器件形成其输出信号的频率至少地受偏置于所述被测器件的栅端的电压控制的压控振荡器; [0010] The ring oscillator comprises at least one flow control inverter, the device under test is used to control the flow control through inverter current, so that the ring oscillator formed thereon and the device under test at least the output signal frequency of the VCO to the gate terminal biased to a voltage-controlled by the device under test;

[0011 ]所述第一个振荡周期测试模块同步地受所述第一控制信号控制,以至于所述被测器件的栅端被切换至偏置所述第二电压时,所述压控振荡器的输出信号的第一个周期的相关信号被所述第一个振荡周期测试模块测试输出。 When [0011] the first oscillation period that is in synchronization with the test modules of the first control signal, so that the gate terminal of said device under test is switched to the second bias voltage, said voltage controlled oscillator correlation signal of the first cycle of the output signal is the first test module test output oscillation period.

[0012] 在一实施例中,所述被测器件可以为匪OSFET,所述第一电压大于所述匪OSFET的阈值电压,所述第二电压小于所述NM0SFET的阈值电压。 [0012] In one embodiment, the device under test may be a bandit OSFET, the first voltage is greater than the threshold voltage OSFET bandit, the second voltage is less than the threshold voltage of the NM0SFET.

[0013]在又一实施例中,所述被测器件可以为PM0SFET,所述第一电压为负向电压并且其绝对值大于所述PM0SFET的阈值电压的绝对值,所述第二电压为负向电压并且其小于所述PM0SFET的阈值电压的绝对值。 [0013] In yet another embodiment, the device under test may be PM0SFET, the first voltage and a negative voltage whose absolute value is greater than the threshold voltage of the PM0SFET absolute value, the second voltage is negative and the voltage which is smaller than the absolute value of the threshold voltage of the PM0SFET.

[0014]按照本发明一实施例的BTI测试装置,其中,所述环形振荡器基本由偶数个第一反相器和奇数个流控反相器串联形成。 [0014] The testing device BTI one embodiment of the present invention, wherein the ring oscillator is formed substantially by a series of the first inverter and an even number of an odd number of inverters flow control.

[0015]进一步,所述流控反相器为CMOS反相器,所述被测器件与所述CMOS反相器的其中一个MOS管的源端/漏端串联连接。 [0015] Further, the flow control inverter is a CMOS inverter, the source of the device under test and the CMOS inverter in which a MOS tube / drain terminal connected in series.

[0016]进一步,所述压控振荡器的输出信号的第一个周期的相关信号为第一个周期的周期值。 [0016] Further, a first cycle of said voltage controlled oscillator output signal value of the first correlation signal for the period of a cycle.

[0017]进一步,所述周期值反映所述第二电压与所述被测器件的阈值电压之差的绝对值的大小。 [0017] Further, the absolute value of the period value reflects the difference between the threshold voltage of said second voltage and said device under test.

[0018]进一步,在所述第二电压固定的情况下,所述周期值反映所述被测器件的阈值电压变化,以进一步反映所述第一电压偏置的情况下所发生的BTI效应的大小。 [0018] Further, in the second voltage is fixed, the periodic change in the threshold voltage of the device under test to reflect, BTI to further reflect the effect of the case of the first voltage bias that occurred size.

[0019]在之前所述任一实施例的BTI测试装置中,所述第一信号为脉冲信号。 [0019] In the test apparatus according to any one BTI prior embodiment, the first signal is a pulse signal.

[0020]按照本发明的又一方面,提供一种使用以上所述的BTI测试装置进行BTI测试的方法,其包括: [0020] According to the present invention, a further aspect, there is provided an apparatus for testing BTI using BTI outlined above, a method of testing, comprising:

[0021 ]校准步骤:在所述被测器件被测试前,将与所述被测器件对应相同的校准单元对应置于所述装置中,在所述校准单元的栅端上偏置多个不同大小的第二电压,并通过所述第一个振荡周期测试模块测试每个第二电压对应的所述第一个周期的周期值,基于所述第二电压与所述周期值建立形成所述第二电压与所述第一个周期的周期值之间的关系曲线; [0021] Step Calibration: Before the device under test is tested with the device under test will correspond to the same calibration unit disposed corresponding to said device, said calibration means in the gate bias of a plurality of different end the size of the second voltage, and the voltage value of the second test period corresponding to each of the first cycle of the first oscillation period by the test module, establish the value of the second voltage is formed based on the period of the curve cycle value of the second voltage and the first period between;

[0022] BTI产生步骤:对所述被测器件进行测试时,将所述被测器件中置于所述装置中形成所述压控振荡器,控制所述第一信号以使所述第一电压偏置所述被测器件的栅端; [0022] BTI generating step: When testing the device under test, the device under test is placed in the forming of said voltage controlled oscillator means, said first control signal such that said first the gate bias voltage terminal device under test;

[0023] BTI效应测试步骤:控制所述第一信号以使偏置所述被测器件的栅端的第一电压切换为第二电压,同时,所述第一信号使第一个振荡周期测试模块工作并实时地测试输出所述压控振荡器的输出信号的第一个周期的周期值;以及 [0023] BTI effect Test procedure: said first control signal to the bias voltage of the first gate terminal of the device under test is switched to a second voltage, while the first cycle of oscillation signal so that the first test module working in real time and test the output value of the first voltage-controlled period of the cycle of the oscillator output signal; and

[0024]比较计算步骤:将所述第二电压偏置的情况下所得到的所述周期值在所述关系曲线中进行比较计算以反映所述第一电压偏置条件下所述被测器件发生的BTI效应。 [0024] Comparative calculation step: the case where the value of the period of the second bias voltage was subjected to the bias voltage condition at said first device under test comparing the calculated to reflect the relation curve BTI effects occurred.

[0025] 在一实施例中,所述被测器件为匪OSFET时,所述第一电压大于所述匪OSFET的阈值电压,所述第二电压小于所述NM0SFET的阈值电压。 [0025] In one embodiment, the device under test as a bandit OSFET, the first voltage is greater than the bandit OSFET threshold voltage, the second voltage is less than the threshold voltage of the NM0SFET.

[0026]在又一实施例中,所述被测器件为PM0SFET时,所述第一电压为负向电压并且其绝对值大于所述PM0SFET的阈值电压的绝对值,所述第二电压为负向电压并且其小于所述PM0SFET的阈值电压的绝对值。 [0026] In yet another embodiment, the device under test when PM0SFET, the first voltage is a negative voltage whose absolute value is greater than the absolute value and the threshold voltage of the PM0SFET, the second voltage is negative and the voltage which is smaller than the absolute value of the threshold voltage of the PM0SFET.

[0027]进一步,所述比较计算步骤中,基于所述第二电压偏置的情况下所得到的所述周期值,在所述关系曲线中对应计算得出第二电压,将该计算得出的第二电压与在BTI效应测试步骤中所偏置的第二电压进行差值计算,以反映所述被测器件在偏压温度不稳定性效应测试步骤中产生的阈值偏移。 [0027] Further, the step of comparing the calculated, based on the value of the period when the second bias voltage being obtained, corresponding to the calculated second voltage dependence curve, the calculated a second voltage and the second voltage at the test step in the BTI effects were offset difference calculating, the threshold value of the device under test to reflect the generated bias temperature instability effect at the test step offset.

[0028]本发明的技术效果是,第一,由于其输出的第一个振荡周期的相关信号是数字信号测量,其测试准确;第二,第一个振荡周期的周期值T是基于VCO的流控MOS管(也即被测器件)工作于亚阈值区测试得出,因此,其可以放大地反映出其Vth受BTI效应的变化,测试灵敏度高。 [0028] Technical effects of the present invention is, first, because the first oscillation period of a correlation signal which is a digital output signal measurements, the test accuracy; the second, the first cycle of the oscillation period T is based on the value of the VCO flow control MOS transistor (ie DUT) operating in sub-threshold region test results, therefore, it can be enlarged to reflect changes in its Vth BTI effects that high test sensitivity. 第三,通过对VCO输出的第一振荡周期的周期值T测量,可以在第一电压去除后实时同步测试完成,测试速度快,其测试结果受BTI效应的恢复效应影响小,更进一步地实现了准确测量;第四,整个测试装置未引入模拟电路,整体电路简单。 Third, through the first oscillation period of VCO output value of the period T measurements can be synchronized in real time after the first test voltage removal is complete, test speed, the test results were affected by a small recovery Effect BTI effects, further realization accurate measurement; fourth, the entire test device is not introduced into the analog circuit, the overall circuit is simple.

附图说明 BRIEF DESCRIPTION

[0029]从结合附图的以下详细说明中,将会使本发明的上述和其他目的及优点更加完全清楚,其中,相同或相似的要素采用相同的标号表示。 [0029] from the following detailed description in conjunction with the drawings, will make the aforementioned and other objects and advantages of the present invention will be more fully understood, in which the same or similar elements use the same reference numerals.

[0030]图1是按照本发明一实施例提供的BTI测试装置的电路模块结构示意图。 [0030] Figure 1 is a schematic diagram of a circuit module in accordance with the test configuration BTI device according to an embodiment of the present invention is provided.

[0031]图2是图1所示实施例的BTI测试装置所测试出的VCO的第一个振荡周期的周期值T与Vm3as之间的关系曲线。 [0031] FIG. 2 is a first oscillation period of BTI test device of the embodiment of the test out of the cycle of the VCO shown in FIG. 1 relation between the curve T and Vm3as.

[0032]图3是按照本发明又一实施例提供的BTI测试装置的电路模块结构示意图。 [0032] FIG. 3 is a schematic structural view of a circuit module BTI test apparatus according to the present embodiment provides a further embodiment of the invention.

[0033]图4是基于图3所示实施例的BTI测试装置的测试时序关系示意图。 [0033] FIG. 4 is a schematic diagram of the timing relationship between BTI test test apparatus embodiment shown in FIG. 3 based.

具体实施方式 detailed description

[0034]下面介绍的是本发明的多个可能实施例中的一些,旨在提供对本发明的基本了解,并不旨在确认本发明的关键或决定性的要素或限定所要保护的范围。 [0034] Here is a plurality of possible embodiments of the present invention, some designed to provide a basic understanding of the present invention is not intended to confirm the scope of the present invention key or critical elements or limitations to be protected. 容易理解,根据本发明的技术方案,在不变更本发明的实质精神下,本领域的一般技术人员可以提出可相互替换的其他实现方式。 Easy to understand, according to the technical aspect of the present invention, without changing the essence of the spirit of the present invention, one of ordinary skill in the art can make other implementations can be interchangeable. 因此,以下具体实施方式以及附图仅是对本发明的技术方案的示例性说明,而不应当视为本发明的全部或者视为对本发明技术方案的限定或限制。 Therefore, the following detailed description and drawings are merely the technical aspect of the present invention is illustrative, and should not be considered as a whole or deemed to limit or restrict the present invention, the technical aspect of the present invention.

[0035]图1所示为按照本发明一实施例提供的BTI测试装置的电路模块结构示意图。 [0035] Figure 1 shows a block schematic diagram of a circuit configuration according to the embodiment BTI test apparatus of an embodiment of the present invention is provided. 在该实施例中,BTI测试装置100用于对被测器件(DUT) 120进行测试,DUT120在该示例中为匪0SFET,但是,DUT120并不限于本示例,其可以选择为其他类似MOS管结构的器件,例如,PM0SFET 等。 In this embodiment, the test apparatus 100 for BTI device under test (DUT) 120 test, DUT120 in this example is bandit 0SFET, however, DUT120 not limited to this example, it can select MOS transistor structure similar to devices, for example, PM0SFET like.

[0036] 继续如图1所示,BTI测试装置100主要地包括基于多级反相器串联形成的环形振荡器(Ring 0scillator)110,在本发明中,环形振荡器110与DUT120共同形成VC0。 [0036] Continue 1, BTI testing apparatus 100 mainly includes a ring oscillator based (Ring 0scillator) forming a multi-stage series inverters 110, in the present invention, the ring oscillator 110 is formed together with the DUT120 VC0. 该VCO可以基于环形振荡器110的传输延时调节振荡器频率。 The VCO may delay adjusting the oscillator frequency ring oscillator 110 based on the transmission. 环形振荡器110在该实施例中通过奇数个(大于或等于3个)反相器串联连接形成环路来实现。 Ring oscillator 110 in this embodiment by an odd number (greater than or equal to 3) inverters connected in series to form a loop to achieve. 具体地,包括偶数个反相器112和奇数个流控反相器111,如图1中所示,环形振荡器110包括4个反相器112和I个流控反相器111,每个反相器的输出端连接至另一个反相器的输入端,依次首尾串联连接形成环路。 In particular, an even number of inverter 112 comprising an odd number of flow control and inverter 111, as shown in the figure, the ring oscillator 1101 comprises four inverters 112 and a flow control I inverters 111, each output of the inverter is connected to the other input terminal of the inverter, in turn connected in series to form a loop end to end. 其中,流控反相器111具体可以选择为如图所示的CMOS反相器。 Wherein the specific flow control inverter 111 may be selected as a CMOS inverter shown in FIG. 流经流控反相器111的电流大小是受DUT120控制,因此,DUT120也用作的流控反相器111的流控MOS管。 The current flowing through the flow control the size of the inverter 111 is controlled by DUT120, therefore, DUT120 also used as flow control flow control MOS transistor inverter 111.

[0037] 流控反相器111中的其中一个MOS管(Ml)的漏端或源端串联连接于DUT120的源端或漏端,流控反相器111中的另一个MOS管(M2)的源端或漏端输入电压VDD(例如1.2V),因此,DUT120的栅端偏置电压可以控制流经DUT120的电流,也即可以控制流经流控反相器111的电流。 [0037] The flow control inverter 111 wherein a MOS transistor (of Ml) end of the drain or source terminal connected in series to the source or drain terminal of DUT120, flow control inverter 111 further MOS transistor (M2) the source or drain of the input voltage VDD (e.g., 1.2V), and therefore, the gate terminal of the bias voltage DUT120 can control the current flowing through DUT120, i.e., flow control can control the current flowing through the inverter 111. 控制栅端偏置电压以使DUT120工作于亚阈值区时,流经流控反相器111的电流是受DUT120的栅端偏置电压所控制,并且对其变化反应灵敏。 When the control gate terminal bias voltage so DUT120 work in sub-threshold region, the current flowing through the flow control inverter 111 is subject DUT120 gate bias voltage control terminal and responsive to its change.

[0038] 在又一实施例中,4个反相器112也可以为CMOS反相器,但是其并不受DUT120控制。 [0038] In yet another embodiment, four inverters 112 may be a CMOS inverter, but it is not controlled by DUT120. 另外,流控反相器111与DUT120之间的位置关系并不受图示实施例限制,例如,在其他实施例中,DUT120为PMOSFET时,其也可以置于流控反相器111上方并与M2的源端或漏端串连。 Further, the positional relationship between the 111 and the flow control DUT120 inverter is not subject to limitation embodiment illustrated embodiment, for example, in other embodiments, when PMOSFET are DUT120, which may be placed above the flow control 111 and inverter M2 and the source or drain terminals in series.

[0039]该VCO的输出信号的输出频率f是取决于串联的反相器的总传输延时。 [0039] The output signal of the VCO output frequency f is dependent on the overall series inverter propagation delay. 而当DUT120的压控端(也即栅端)输入的电压小于其阈值电压(Vth)时,其流过的电流为亚阈值电流。 When a voltage controlled DUT120 end (ie, the gate terminal) input voltage is less than the threshold voltage (Vth) when it flows through the current sub-threshold current. 由于亚阈值电流通常比较小,对于DUT120所连接的流控反相器111,其传输延时远远大于其他反相器112的传输延,此时,输出频率f基本取决于流控反相器111的传输延时,从而输出频率f(即输出信号的频率)主要取决于流经DUT120的亚阈值电流,进而通过f可以基本反映DUT120的亚阈值电流信息,进而可以通过f反映了DUT120上所偏置的栅端电压信息,也即输出频率f的周期信息可以反映DUT120上所偏置的栅端电压信息。 Since the sub-threshold current is usually relatively small, the flow control connected inverters DUT120 111, the transmission delay is far greater than other transmission delay inverter 112, in which case, depending on the output frequency f basic flow control inverter transmission delay 111, so that the output frequency f (ie, the output signal frequency) depends primarily on flows DUT120 subthreshold currents, which can basically reflect DUT120 subthreshold current information f, f further by reflecting on the DUT120 information bias gate terminal voltage, ie the output frequency f cycle information can be reflected on DUT120 the bias gate terminal voltage information.

[0040]继续如图1所示,BTI测试装置100还包括模拟电压切换模块130和第一个振荡周期测试模块140。 [0040] Continue 1, BTI test apparatus 100 further comprises an analog voltage switching module 130 and a first test module 140 oscillation period. 其中模拟电压切换模块130其用于控制偏置于DUT120的栅端的电压信号,具体地,为测试DUT的BTI效应,偏置于DUT120的栅端的电压信号至少需要使用Vmeas132和Vstress131,其中,Vstress131为在BTI测试过程中向DUT的栅端偏置的电压应力(例如,在某一温度条件下),在本文中简称为“第一电压”,在该实例中,其选择大于DUT的阈值电压(例如 Wherein an analog voltage for controlling the switching module 130 is biased at the gate terminal of the DUT120 voltage signals, in particular, the effect that the DUT's BTI, to bias the gate terminal of the DUT120 voltage signals and then at least Vmeas132 Vstress131, wherein, Vstress131 is BTI in the testing process to the DUT terminal gate bias voltage stress (for example, at a certain temperature conditions), referred to herein as the "first voltage", in this example, the choice is greater than the threshold voltage of the DUT ( E.g

1.2V或以上);Vmeas132为使DUT工作于亚阈值区的电压,在本文中简称为“第二电压”,在该实施例中,其选择小于DUT的阈值电压。 1.2V or above); Vmeas132 to make DUT operating voltage in the sub-threshold region, referred to herein as the "second voltage" in this embodiment, the choice is less than the threshold voltage of the DUT. Vmeas 132和Vstress 131均为模拟电压,切换模块130具体可以通过信号(Sel)190控制,例如,信号190可以为电压脉冲信号,当其为低电平时,模拟电压切换模块130选择Vstress131并将其偏置在DUT120的栅端上;当信号190为高电平时,模拟电压切换模块130选择Vmeas132并将其偏置在DUT120的栅端上,从而方便地实现切换控制。 Vmeas 132 and Vstress 131 are analog voltages, switching module 130 via signal specific (of Sel) control 190, e.g., signal 190 may be a voltage pulse signal, when it is low, the analog voltage switching module 130 selects and Vstress131 biased in DUT120 gate terminal; when the signal 190 is high, the analog voltage switching module 130 selects Vmeas132 and biased in DUT120 gate terminal, making it easy to achieve the switching control.

[0041]同时,信号190还偏置于第一个振荡周期测试模块140上,例如,信号190偏置于高电平时(此时Vmeas132偏置于DUT120,使其工作于亚阈值区),第一个振荡周期测试模块140同步地开始工作测量VCO输出的第一个振荡周期(也即输出信号的第一个周期)的相关信息并输出141,例如,输出141为第一个振荡周期的周期值T。 [0041] Meanwhile, the signal 190 is also biased to the first oscillation cycle test module 140, for example, signal 190 is biased at a high level (at this time Vmeas132 biased DUT120, to make it work in sub-threshold region), para. one oscillation cycle test module 140 in synchronization with the start of work measuring the VCO output of the first oscillation period (ie, the output signal of the first cycle) of relevant information and output 141, for example, output 141 is a periodic oscillation cycle value T.

[0042] 基于图1所示的DUT测试装置在对DUT120进行BTI测试时,首先,步骤S910,在DUT120被在被偏置Vstress131之前,选择与DUT120结构参数相同的校准单元作为流控MOS管。 [0042] Based on DUT test device shown in FIG. 1 when DUT120 performed BTI test, first in step S910, is in DUT120 before being biased Vstress131, select DUT120 same structure parameter calibration unit as flow control MOS transistor. 如上所述输出信号的周期值T可以反映DUT120上所偏置的栅端电压信息,因此,同样可以在校准单元上偏置不同大小的Vme3as132,相应地测量出VCO的多个第一个振荡周期的周期值T,从而可以得到T与Vm■之间的关系曲线。 The cycle described above, the output signal can reflect the value T DUT120 gate terminal voltage is offset information, therefore, also of different sizes may be biased Vme3as132 on the calibration unit, to measure a plurality of corresponding first VCO oscillation period period value T, can be obtained curve T and Vm ■ between. 其中,校准单元为未受BTI影响的匪OSFET,其阈值电压与DUT120相同。 Wherein the calibration unit is unaffected BTI affected bandit OSFET, its threshold voltage DUT120 same.

[0043]图2所示为图1所示实施例的BTI测试装置所测试出的VCO的第一个振荡周期的周期值T与V^之间的关系曲线。 [0043] Figure 2 is shown in FIG. 1 a first periodic oscillation period of the test apparatus of an embodiment of BTI and tested by the VCO and the value of the V T ^ relation between curve. 在该实施例中,在不同Vme3as132的情况下,信号190输入高电平,使模拟电压切换模块130选择Vmeas132,此时,校准单元工作于亚阈值区,流经校准单元和流控反相器111的电流Ii受Vmeas132控制,|*-^|越大(由于之前没有偏置^^131,Vth基本没有发生变化,即此时基本不存在BTI效应),电流I1越小;此时,流控反相器111延迟远远大于反相器112的延迟,因此,环形振荡器110与校准单元构成的VCO的输出频率f由流控反相器111的延迟决定,也即第一个振荡周期的周期值T由Vmeas(此时Vth基本不变)决定。 In this embodiment, in the case of different Vme3as132, the input signal 190 high, so that the analog voltage switching module 130 selects Vmeas132, this time, the calibration unit is operated in sub-threshold region, flows through the calibration unit and flow control inverter current 111 Ii by Vmeas132 control, | * - ^ | the greater (due to no prior bias ^^ 131, Vth basically has not changed, that is, at this time there is no fundamental effect BTI), the smaller the current I1; in this case, flow control inverter 111 is much greater than the delay of the delay inverter 112, therefore, the ring oscillator 110 and a VCO calibration unit configured delay of the output frequency f of the inverter is determined by the flow control 111, i.e., the first a periodic oscillation period is determined by the value of T Vmeas (Vth at this time is essentially the same). 因此,在Vme3as变化的情况下,根据相应到测量的多个第一个振荡周期的周期值T,可以得到如图2所示的周期值1~与Vm■的函数关系曲线。 Thus, in the case Vme3as changes, according to the respective plurality of measurement cycles of a first oscillation period value of the T, the cycle can be obtained as shown in 1 ~ 2 value of Vm ■ function curve in FIG.

[0044] 进一步,步骤S920,准备测试BTI效应,通过信号190输入低电平(电压脉冲信号为低电平),使模拟电压切换模块130选择3^131,此时,01]1!20处于应力偏置条件下。 [0044] Further, in step S920, ready to test effects of BTI, by the low level input signal 190 (voltage pulse signal is low), the analog voltage switching module 130 selects 3 ^ 131, at this time, 01] 1! 20 It is under stress bias conditions. Vstress131的偏置时间由信号190的电压脉冲信号的低电平时间长短决定,其可以根据具体测试要求而进行具体选择设置。 Vstress131 offset length of time determined by the time signal low voltage pulse signal 190, which may be carried out according to specific test requirements specific to select settings.

[0045]进一步,步骤S930,通过信号190输入高电平,使模拟电压切换模块130选择Vmeas132,此时,DUT120工作于亚阈值区,流经DUT120和流控反相器111的电流控制,I Vth-Vmeas I越大,电流I1越小;此时,流控反相器111延迟远远大于反相器112的延迟,因此,环形振荡器110与DUT120构成的VCO的输出频率f由流控反相器111的延迟决定,也即由I [0045] Further, in step S930, by the high level input signal 190, the analog voltage switching module 130 selects Vmeas132, at this time, DUT120 work in sub-threshold region, and flow control flows DUT120 inverter current control 111, I Vth-Vmeas I larger current I1 is smaller; this time, the flow control inverter 111 is much greater than the delay of the delay inverter 112, therefore, the ring oscillator 110 and DUT120 constituted VCO output frequency f by the flow control inverter delay 111 of the decision, i.e., the I

Vth-Vmeas I 决定。 Vth-Vmeas decided.

[0046]同时,在VCO起振后,信号190输入高电平控制第一个振荡周期测试模块140开始工作,其基本可以在应力偏置去除的条件下很快地测试出该Vme3as对应的第一个振荡周期的周期值T,例如可以在10ns内测量振荡的第一个周期的结果。 [0046] Meanwhile, after the VCO oscillating, input level control signal 190 first oscillation cycle test module 140 to work, the basic can quickly test the bias removed under stress conditions of the corresponding first Vme3as a periodic oscillation period value T, for example, the measurement results of the first cycle of oscillation within 10ns. 因此,DUT120的BTI的恢复效应在此基本可以得到克服,并且测试速度快。 Thus, the effects of the recovery in the BTI DUT120 this base can be overcome, and the test speed.

[0047]进一步,步骤S940,根据第一个振荡周期的周期值T,基于图2所示的关系曲线,可以对应地得出Vm■,该Vm■与实际偏置的Vme3as (步骤S9 3 O中的Vme3as)之间的差值,是由Vstress 131对DUT产生的BTI效应所导致的,也即反映了Vstress 131偏置后的DUT120的阈值电压Vth的偏移量。 [0047] Further, the step of S940, a value based on the oscillation period of the first cycle the T, the curve shown in Figure 2 based, may be derived Vm ■ correspondence, the actual offset Vm ■ Vme3as (Step S9 3 O the difference in Vme3as) between the BTI Vstress 131 by the effect produced by the DUT caused, that reflects the bias after DUT120 Vstress 131 threshold voltage Vth offset.

[0048]综合上可知,BTI效应可以由图1所示实施例的测试装置100准备快速的测试得出。 [0048] Integrated the foregoing, BTI effect test apparatus 100 prepares for flash test derived from the embodiment shown in FIG. 由于其输出的第一个振荡周期的相关信号是数字信号测量,其测试准确;并且,第一个振荡周期的周期值T是基于VCO的流控MOS管(也即DUT120)工作于亚阈值区测试得出,因此,其可以放大地反映出其Vth的受BTI效应的变化,测试灵敏度高。 Since the first oscillation period of the output correlation signal is a digital signal measurement, the test is accurate; and, a periodic oscillation period T is based on the value of the VCO flow control MOS transistor (ie DUT120) working in sub-threshold region test results, and therefore, it can be enlarged to reflect changes in its Vth by BTI effects, high test sensitivity. 进一步,通过对VCO输出的第一振荡周期的周期值T测量,可以在Vstress131去除后实时同步测试完成(例如可以达到10ns以内),测试速度快,其测试结果受BTI效应的恢复效应影响小,更进一步地实现了准确测量。 Further, through the period of the VCO output value of the first oscillation period T measurement, real-time synchronization test is completed after Vstress131 removal (for example, to within 10ns), test speed, the test results were affected by a small recovery Effect BTI effects, further to achieve an accurate measurement. 同时,整个测试装置未弓I入模拟电路,整体电路简单。 Also, the entire test device I did not bow into the analog circuit, the overall circuit is simple.

[0049]需要说明的是,更换DUT120时,如果更换后的DUT与更换之前的DUT为相同的器件,例如,在同一晶圆上制备的器件,或者在同一工艺流水线上制备的器件,则可以继续采用图2所示的关系曲线,重复步骤S920至步骤S940即可是实现对于更换后的DUT的BTI测试。 [0049] It should be noted that, when replacing DUT120, if the replacement of the DUT and the DUT before changing to the same device, for example, devices on the same wafer preparation, or devices on the same assembly line process preparation, you can continue to use the curve shown in Figure 2, repeat steps S920 to step S940 can be realized for the replacement of the BTI DUT test. 当然,也可以在改变Vstress大小后,重复步骤S920至步骤S940进行不同Vstress条件下对应于DUT的BTI效应测试。 Of course, you can also change after Vstress size, repeat steps S920 to step S940 carried out under different conditions corresponding to the DUT Vstress effect of BTI test. 进一步,如果更换后的DUT与更换之前的DUT为不同器件,需要重新选取与更换后的DUT对应相同的校准单元,执行步骤S910,测试出其周期值1~与„■的函数关系曲线。 Further, if the replacement of the DUT and replacement before DUT for different devices, we need to re-select the DUT corresponding to the replacement of the same calibration unit, a step S910, to test its period value of 1 to a function of the "■ curve.

[0050]图3所示为按照本发明又一实施例提供的BTI测试装置的电路模块结构示意图。 [0050] FIG 3 BTI circuit module structure diagram of the test apparatus according to the present invention is provided in a further embodiment. 该实施例的BTI测试装置300与图1所示实施例的BTI测试装置100测试原理基本相同。 BTI test apparatus 300 of the embodiment of FIG. 100 test principle BTI test device 1 of the illustrated embodiment is substantially the same. 在该实施例中,可以对DUT阵列进行测试,如图3所示,DUT阵列320包括多个DUT单元,每个单元可以被选择与环形振荡器310形成VC0。 In this embodiment, an array of the DUT can be tested, shown in Figure 3, comprises a plurality of DUT DUT arrays 320 units, each unit may be selected with the ring oscillator 310 is formed VC0. 同样地,环形振荡器310与图1所示的环形振荡器110基本类似,其至少包括一个流控反相器,其可以与被选择的DUT单元串联,从而,形成的VCO的输出信号的频率可以基本地由偏置在DUT单元的栅端的信号来控制。 Frequency Likewise, the ring oscillator 1101 is substantially similar to the ring oscillator 310 shown in FIG, comprising at least one flow control inverter, which may be connected in series with the DUT selection unit, thereby forming the VCO output signal It may be substantially at the end of the gate signal of DUT unit controlled by a bias. 具体地,BTI测试装置300可以通过如图所示的地址解码器和堆栈转换器来根据地址信号对应选择测DUT单元,因此,该实施例的BTI测试装置300可以方便的进行阵列测试。 Specifically, the test apparatus 300 can BTI address decoder and transducer stack as shown to correspond to the address selection signal measuring unit DUT, therefore, BTI testing device 300 of this embodiment can easily be tested arrays. 当然,DUT阵列320中也可以包括校准单元,在执行以上所述的步骤S910时,可以选择某一相应校准单元进行测试。 Of course, the DUT array 320 can also include a calibration unit, in the step S910 described above when executed, may select an appropriate calibration unit be tested.

[0051]继续如图3所示,BTI测试装置300的模拟电压切换模块330同样可以至少地实现如图1所示的模拟电压切换模块130的功能。 [0051] As shown in FIG continue, the analog voltage BTI test apparatus 300 switches 3 module 330 may be implemented at least similarly to the analog voltage shown in FIG. 1 switching module 130 functions. Vme3as132和Vstre3ss131之间的切换同样可以受信号190控制,当然,该实施例中,信号Str/Rec还可以控制Vrecciver和Vciff之间的切换,其中,Vciff偏置时,使其他未被选中的DUT单元全部关断,Vre3„偏置时,针对被选中的DUT单元,测量其Vth恢复的过程。 Switching between Vstre3ss131 Vme3as132 and can also be controlled by the signal 190, of course, in this embodiment, the signal Str / Rec can also control the switching between Vrecciver and Vciff, wherein when Vciff bias, so that other unselected DUT all units off, Vre3 "the offset for the selected DUT unit, measuring its Vth recovery process.

[0052]信号190同时偏置于第一个振荡周期测试模块340的控制逻辑子模块341上。 [0052] while the bias signal 190 on the first oscillation cycle test module control logic of the sub-modules 341 340. 第一个振荡周期测试模块340的功能与如图1所示的第一个振荡周期测试模块140的功能基本相同。 The first period of oscillation test module 340 functions as shown in the first period of oscillation test module shown in 1140 in essentially the same function. 如图3所示,基本由环形振荡器310和DUT阵列320形成的VCO的输出信号经过电平移位模块350进行处理后,分别输出控制逻辑子模块341和频分器360。 Shown, VCO output signal consists essentially of the ring oscillator 310 and the DUT array 320 is formed after the level shifter module 350 for processing, the output control logic sub-module 341 and frequency divider 360 are shown in Figure 3. 具体地,在该实施例中,341是控制逻辑单元,主要是状态机,根据Sel信号和VCOout信号的变化,产生状态的变化,采样VCOout的第一个周期并控制计数器单元342的使能和清零;342是同步计数器单元,具有清零和使能端,根据清零和使能信号进行清零或计数;343是寄存器单元,将同步计数器单元342的数值进行保存,直到控制逻辑单元340产生清零为止。 Specifically, in this embodiment, the control logic unit 341 is primarily a state machine, according to changes in signal Sel and VCOout signal, resulting in changes in the state, the first sampling period VCOout and control counter unit 342 enable and cleared; 342 is a synchronous counter unit has cleared and enable terminal, or count is cleared and cleared according to the enable signal; 343 is a register unit, the value of the synchronization counter unit 342 will be stored until the control logic unit 340 generate cleared up. 频分器360进一步输出该VCO所对应的输出频率€_0此。 Frequency divider 360 is further output of the VCO output frequency corresponding to € _0 this.

[0053]图4所示为基于图3所示实施例的BTI测试装置的测试时序关系示意图。 [0053] FIG. 4 is a test based on the timing relationship shown in FIG. 3 BTI schematic diagram of an embodiment of the test device. 基于图4所示实施例的信号,反映了该BTI测试装置的测试原理。 4 based on the signal of the illustrated embodiment, the test reflects the principle of the BTI test apparatus. 其中,Sel信号是测试使能信号,当偏置应力或恢复一段时间之后启动Sel进行DUT单元的Vth的测量。 Wherein, Sel signal is a test enable signal, when the bias stress or recovery after a period of time to start Sel measure Vth of the DUT unit. V⑶。 V⑶. 测试过程中该VCO的振荡信号输出,在Sel为高电平的整个过程中都会振荡。 Testing process the output of the VCO oscillating signal in Sel at a high level throughout the process will oscillate. Counter_en是控制逻辑采样VCO的第一个周期,产生与VCO第一个周期相同的脉冲,控制计数器计数,这样就实现了将V⑶的第一个周期转为数字数据。 Counter_en sampling VCO control logic is the first cycle, the first cycle generates the same pulse VCO, the control counter, thus achieving the first of a cycle V⑶ to digital data. CLK是时钟信号,一直有效。 CLK is a clock signal, has been effective. Data_out是计数器输出,在Counter_en有效的器件计数并输出结果,一旦Counter_en无效,则保持结果,并一直保持到下一次Sel为高电平,Sel—旦为高电平会由控制逻辑模块单元341对其清零。 Data_out is a counter output, Counter_en efficient device count and outputs the result, once Counter_en invalid, the result remained, and remains high until the next Sel, Sel- denier high will the control logic module unit 341 pairs cleared.

[0054]以上例子主要说明了本发明的BTI测试装置及其测试方法。 [0054] The above example illustrates the BTI main testing device and testing method of the present invention. 尽管只对其中一些本发明的实施方式进行了描述,但是本领域普通技术人员应当了解,本发明可以在不偏离其主旨与范围内以许多其他的形式实施。 Although only some embodiments of the present invention which have been described, but of ordinary skill in the art would understand that the present invention can be made without departing from the spirit and scope thereof in many other forms. 因此,所展示的例子与实施方式被视为示意性的而非限制性的,在不脱离如所附各权利要求所定义的本发明精神及范围的情况下,本发明可能涵盖各种的修改与替换。 Accordingly, the display examples and embodiments are to be considered as illustrative and not restrictive, without departing from the spirit and scope of the invention as defined in the attached claims the present invention may cover various modifications and replacement.

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Classifications
International ClassificationG01R31/26
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