CN103513173A - BTI testing device based on voltage-controlled oscillator and testing method thereof - Google Patents
BTI testing device based on voltage-controlled oscillator and testing method thereof Download PDFInfo
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Abstract
The invention provides a bias temperature instability (BTI) testing device based on a voltage-controlled oscillator (VCO) and a testing method of the BTI testing device, and belongs to the technical field of semiconductor device reliability testing. The BTI testing device comprises a device under test (DUT), a ring oscillator (RO), an analog voltage switch module and a first oscillation period test module. The analog voltage switch module is used for controlling the DUT to switch between voltage stress bias and BTI effect test bias. The RO comprises at least one current control phase inverter, and the DUT is used for controlling currents flowing through the current control phase inverter so that the RO and the DUT can form the VCO, wherein the frequency of output signals of the VCO is controlled by the voltage biased at the grid end of the DUT. The first oscillation period test module can synchronously test and output correlated signals in a first period of the output signals of the VCO. The BTI testing device has the advantages of being high in BTI testing sensitivity, accurate in testing, high in testing speed and simple in circuit.
Description
Technical field
The invention belongs to semiconductor device reliability technical field of measurement and test, relate to bias voltage temperature instability (Bias Temperature Instability, BTI) test, be specifically related to a kind of based on voltage controlled oscillator (Voltage Control Oscillator, device and the method for testing thereof of VCO) measured device (Device Under Test, DUT) being carried out to BTI test.
Background technology
BTI effect (comprising negative direction bias voltage temperature instability NBTI and positive dirction bias voltage temperature instability PBTI) refers under uniform temperature condition, when the grid end bias voltage of metal-oxide-semiconductor, the characteristic of metal-oxide-semiconductor can be degenerated, for example, for PMOSFET, threshold voltage (V
th) increase saturation current, sub-threshold slope and be cross over mutual conductance and reduce.Along with the size of device is constantly dwindled, BTI effect becomes one of principal element of device degradation, and therefore, it more and more comes into one's own.
A key character of BTI effect is exactly that it has stronger recovery Effects, for example, for PMOSFET, at high temperature its grid end is setovered to negative bias after a period of time, if should be zero-bias or positive bias by negative bias, the degradation characteristics of device will have very strong recovery.Therefore, the difficult problem of bringing that this gives accurate test MOS tube device, normally, is difficult to measure in real time the situation of change of its threshold voltage.
In the BTI proving installation of prior art, in test process, be generally to measure V
th(identical I
dunder condition) variation or I
d(identical V
gsunder condition) variation, these are all that measure analog signals reflects BTI, conventionally have simulating signal and are difficult to follow the tracks of, measure the shortcoming of insufficient sensitivity, circuit complexity, and finally cause measuring inaccurate.Other also have the method for testing that adopts digital signal to reflect BTI, still, are difficult to realize the requirement of above-described real-time measurement, and test circuit is complicated, finally is also difficult to guarantee the accuracy of test.
In view of this, the present invention proposes a kind of novel BTI proving installation.
Summary of the invention
One of object of the present invention is, simplifies the circuit structure of BTI proving installation.
An also object of the present invention is, improves the accuracy of BTI test.
For realizing above object or other objects, the invention provides a kind of BTI proving installation, it comprise measured device, ring oscillator, analog voltage handover module and first oscillation period test module; Wherein,
Described analog voltage handover module is for carrying out switching controls based on the first control signal to being offset to the first voltage or the second voltage of the grid end of described measured device, shown in the first voltage be to make described measured device that the voltage of BTI effect occur, described second voltage is to make described measured device work in the voltage of subthreshold value;
Described ring oscillator comprises at least one Flow Control phase inverter, described measured device is for controlling the electric current through this Flow Control phase inverter, to such an extent as to described ring oscillator and described measured device form the voltage-controlled voltage controlled oscillator that the frequency of its output signal is at least offset to the grid end of described measured device;
Described first, test module was controlled by described the first control signal synchronously oscillation period, to such an extent as to the grid end of described measured device is switched to biasing during described second voltage, the coherent signal in first cycle of the output signal of described voltage controlled oscillator is by described first test module test output oscillation period.
In one embodiment, described measured device can be NMOSFET, and described the first voltage is greater than the threshold voltage of described NMOSFET, and described second voltage is less than the threshold voltage of described NMOSFET.
In another embodiment, described measured device can be PMOSFET, described the first voltage is the absolute value that negative voltage and its absolute value are greater than the threshold voltage of described PMOSFET, and described second voltage is that negative voltage and its are less than the absolute value of the threshold voltage of described PMOSFET.
According to the BTI proving installation of one embodiment of the invention, wherein, described ring oscillator is formed by even number the first phase inverter and the series connection of odd number Flow Control phase inverter substantially.
Further, described Flow Control phase inverter is CMOS phase inverter, and the source/drain terminal of one of them metal-oxide-semiconductor of described measured device and described CMOS phase inverter is connected in series.
Further, the periodic quantity that the coherent signal in first cycle of the output signal of described voltage controlled oscillator is first cycle.
Further, described periodic quantity reflects the size of absolute value of difference of the threshold voltage of described second voltage and described measured device.
Further, at described second voltage, fixedly in the situation that, described periodic quantity reflects the threshold voltage variation of described measured device, further to reflect the size of the BTI effect being occurred in the situation of described the first voltage bias.
In the BTI proving installation of described arbitrary embodiment before, described first signal is pulse signal.
According to another aspect of the present invention, provide a kind of and use above-described BTI proving installation to carry out the method for BTI test, it comprises:
Calibration steps: before described measured device is tested, to be placed in described device with the corresponding identical alignment unit of described measured device is corresponding, a plurality of different big or small second voltages of grid end upper offset at described alignment unit, and by described first oscillation period test module test the periodic quantity in described first cycle that each second voltage is corresponding, based on described second voltage and described periodic quantity, set up the relation curve forming between described second voltage and the periodic quantity in described first cycle;
BTI produces step: when described measured device is tested, by being placed in described device in described measured device, form described voltage controlled oscillator, control described first signal so that the grid end of measured device described in described the first voltage bias;
BTI effect testing procedure: control described first signal so that the first voltage of the grid end of the described measured device of setovering switches to second voltage, meanwhile, described first signal makes first test module work oscillation period also test in real time the periodic quantity in first cycle of the output signal of exporting described voltage controlled oscillator; And
Compare calculation procedure: resulting described periodic quantity in the situation of described second voltage biasing is compared to the BTI effect of calculating to reflect that under described the first voltage bias condition, described measured device occurs in described relation curve.
In one embodiment, when described measured device is NMOSFET, described the first voltage is greater than the threshold voltage of described NMOSFET, and described second voltage is less than the threshold voltage of described NMOSFET.
In another embodiment, when described measured device is PMOSFET, described the first voltage is the absolute value that negative voltage and its absolute value are greater than the threshold voltage of described PMOSFET, and described second voltage is that negative voltage and its are less than the absolute value of the threshold voltage of described PMOSFET.
Further, in described relatively calculation procedure, resulting described periodic quantity in situation based on described second voltage biasing, in described relation curve, correspondence calculates second voltage, the second voltage that this is calculated carries out difference calculating with the second voltage of setovering in BTI effect testing procedure, with the threshold shift that reflects that described measured device produces in bias voltage temperature instability effect testing procedure.
Technique effect of the present invention is, the first, and because the coherent signal of first oscillation period of its output is that digital signal is measured, its test is accurately; The second, the periodic quantity T of first oscillation period is that the Flow Control metal-oxide-semiconductor (being also measured device) based on VCO works in sub-threshold region test and draws, therefore, it can reflect its V enlargedly
thbe subject to the variation of BTI effect, measurement sensitivity is high.The 3rd, by the periodic quantity T of the first oscillation period of VCO output is measured, can after removing, test by real-time synchronization the first voltage, and test speed is fast, and it is little that its test result is affected by the recovery Effects of BTI effect, further realized Measurement accuracy; The 4th, whole proving installation is not introduced mimic channel, and integrated circuit is simple.
Accompanying drawing explanation
From following detailed description by reference to the accompanying drawings, will make above and other object of the present invention and advantage more completely clear, wherein, same or analogous key element adopts identical label to represent.
Fig. 1 is the circuit modular structure schematic diagram of the BTI proving installation that provides according to one embodiment of the invention.
Fig. 2 is periodic quantity T and the V of first oscillation period of the VCO that tests out of BTI proving installation embodiment illustrated in fig. 1
measbetween relation curve.
Fig. 3 is the circuit modular structure schematic diagram of the BTI proving installation that provides according to further embodiment of this invention.
Fig. 4 is that the test sequence of the BTI proving installation based on embodiment illustrated in fig. 3 is related to schematic diagram.
Embodiment
What introduce below is some in a plurality of possibility embodiment of the present invention, aims to provide basic understanding of the present invention, is not intended to confirm key of the present invention or conclusive key element or limits claimed scope.Easily understand, according to technical scheme of the present invention, do not changing under connotation of the present invention other implementations that one of ordinary skill in the art can propose mutually to replace.Therefore, following embodiment and accompanying drawing are only the exemplary illustrations to technical scheme of the present invention, and should not be considered as of the present invention all or be considered as the restriction of technical solution of the present invention or restriction.
The circuit modular structure schematic diagram of the BTI proving installation providing according to one embodiment of the invention is provided.In this embodiment, BTI proving installation 100 is for measured device (DUT) 120 is tested, and DUT120 is NMOSFET in this example, but DUT120 is not limited to this example, it can be chosen as the device of other similar metal-oxide-semiconductor structures, for example, PMOSFET etc.
Continue as shown in Figure 1, BTI proving installation 100 mainly comprises the ring oscillator (Ring Oscillator) 110 forming based on multistage phase inverter series connection, and in the present invention, ring oscillator 110 forms VCO jointly with DUT120.This VCO can regulate oscillator frequency by the transmission delay based on ring oscillator 110.Ring oscillator 110 is connected in series formation loop by odd number (being more than or equal to 3) phase inverter in this embodiment and realizes.Particularly, comprise even number of inverters 112 and odd number Flow Control phase inverter 111, as shown in fig. 1, ring oscillator 110 comprises 4 phase inverters 112 and 1 Flow Control phase inverter 111, the output terminal of each phase inverter is connected to the input end of another phase inverter, and head and the tail are connected in series formation loop successively.Wherein, Flow Control phase inverter 111 specifically can be chosen as CMOS phase inverter as shown in the figure.The size of current of the Flow Control of flowing through phase inverter 111 is controlled by DUT120, therefore, and the Flow Control metal-oxide-semiconductor of the Flow Control phase inverter 111 that DUT120 is also used as.
The drain terminal of one of them metal-oxide-semiconductor (M1) in Flow Control phase inverter 111 or source or the drain terminal that source is connected in series in DUT120, the source of another metal-oxide-semiconductor (M2) in Flow Control phase inverter 111 or drain terminal input voltage VDD(be 1.2V for example), therefore, the grid end bias voltage of DUT120 can be controlled the electric current of the DUT120 that flows through, also can control the electric current of the Flow Control phase inverter 111 of flowing through.Control gate end bias voltage is so that DUT120 while working in sub-threshold region, and the electric current of the Flow Control of flowing through phase inverter 111 is controlled by the grid end bias voltage of DUT120, and sensitive to its reacting condition.
In another embodiment, 4 phase inverters 112 can be also CMOS phase inverter, but it is not controlled by DUT120.In addition, the position relationship between Flow Control phase inverter 111 and DUT120 is not limited by illustrated embodiment, and for example, in other embodiments, when DUT120 is PMOSFET, it also can be placed in Flow Control phase inverter 111 tops and contact with source or the drain terminal of M2.
The output frequency f of the output signal of this VCO is the total transmission delay that depends on the phase inverter of series connection.And the voltage of inputting when the voltage-controlled end (being also grid end) of DUT120 is less than its threshold voltage (V
th) time, its electric current flowing through is subthreshold current.Because subthreshold current is conventionally smaller, the Flow Control phase inverter 111 connecting for DUT120, its transmission delay is far longer than the transmission of other phase inverters 112 and prolongs, now, output frequency f depends on the transmission delay of Flow Control phase inverter 111 substantially, thereby output frequency f(is the frequency of output signal) depend primarily on the subthreshold current of the DUT120 that flows through, and then by f, can substantially reflect the subthreshold current information of DUT120, and then can reflect the grid terminal voltage information of setovering on DUT120 by f, also the cycle information that is output frequency f can reflect the grid terminal voltage information of setovering on DUT120.
Continue as shown in Figure 1, BTI proving installation 100 also comprise analog voltage handover module 130 and first oscillation period test module 140.Wherein analog voltage handover module 130 its for controlling the voltage signal of the grid end that is offset to DUT120, particularly, be the BTI effect of test DUT, the voltage signal that is offset to the grid end of DUT120 at least needs to use V
meas132 and V
stress131, wherein, V
stress131 be in BTI test process for example, to the voltage stress (, under a certain temperature conditions) of the grid end biasing of DUT, in this article referred to as " the first voltage ", in this example, its selection is greater than the threshold voltage (for example 1.2V or more than) of DUT; V
meas132 for to make DUT work in the voltage of sub-threshold region, and in this article referred to as " second voltage ", in this embodiment, its selection is less than the threshold voltage of DUT.V
meas132 and V
stress131 are analog voltage, and handover module 130 specifically can pass through signal (Sel) 190 to be controlled, and for example, signal 190 can be voltage pulse signal, and when it is low level, analog voltage handover module 130 is selected V
stress131 and be biased on the grid end of DUT120; When signal 190 is high level, analog voltage handover module 130 is selected V
meas132 and be biased on the grid end of DUT120, thus realize easily switching controls.
Meanwhile, signal 190 is also offset on first of test module 140 oscillation period, for example, and (V now when signal 190 is offset to high level
meas132 are offset to DUT120, make it work in sub-threshold region), the relevant information that first, test module 140 was synchronously started working first oscillation period (being also first cycle of output signal) of measuring VCO output oscillation period also exports 141, for example, export 141 for the periodic quantity T of first oscillation period.
DUT proving installation based on shown in Fig. 1 is when carrying out BTI test to DUT120, first, step S910, is being biased V at DUT120
stressbefore 131, select the alignment unit identical with DUT120 structural parameters as Flow Control metal-oxide-semiconductor.The periodic quantity T of output signal can reflect the grid terminal voltage information of setovering on DUT120 as mentioned above, therefore, and equally can be at the V of the different sizes of alignment unit upper offset
meas132, correspondingly measure the periodic quantity T of a plurality of first oscillation period of VCO, thereby can obtain T and V
measbetween relation curve.Wherein, the NMOSFET of alignment unit for not affected by BTI, its threshold voltage is identical with DUT120.
Figure 2 shows that periodic quantity T and the V of first oscillation period of the VCO that BTI proving installation embodiment illustrated in fig. 1 tests out
measbetween relation curve.In this embodiment, at different V
measin 132 situation, signal 190 input high levels, make analog voltage handover module 130 select V
meas132, now, alignment unit works in sub-threshold region, the electric current I of flow through alignment unit and Flow Control phase inverter 111
1be subject to V
meas132 control, ︱ V
th-V
meas︱ is larger (due to the V that do not setover before
stress131, V
thsubstantially do not change, now substantially do not have BTI effect), electric current I
1less; Now, Flow Control phase inverter 111 postpones to be far longer than the delay of phase inverter 112, and therefore, the output frequency f of the VCO that ring oscillator 110 and alignment unit form is determined by the delay of Flow Control phase inverter 111, is also that the periodic quantity T of first oscillation period is by V
meas(V now
thsubstantially constant) determine.Therefore, at V
measin situation about changing, according to the periodic quantity T of a plurality of first oscillation period of mutually required measurement, can obtain periodic quantity T and V as shown in Figure 2
measfunction relation curve.
Further, step S920, setup test BTI effect, by signal 190 input low levels (voltage pulse signal is low level), makes analog voltage handover module 130 select V
stress131, now, DUT120 is under stress biased condition.V
stress131 offset time determines by the low level time length of the voltage pulse signal of signal 190, and it can carry out concrete selection according to concrete test request and arrange.
Further, step S930, by signal 190 input high levels, makes analog voltage handover module 130 select V
meas132, now, DUT120 works in sub-threshold region, the electric current I of flow through DUT120 and Flow Control phase inverter 111
1be subject to V
meas132 control, ︱ V
th-V
meas︱ is larger, electric current I
1less; Now, Flow Control phase inverter 111 postpones to be far longer than the delay of phase inverter 112, and therefore, the output frequency f of the VCO that ring oscillator 110 and DUT120 form is determined by the delay of Flow Control phase inverter 111, also by ︱ V
th-V
meas︱ determines.
Meanwhile, after VCO starting of oscillation, signal 190 input high levels are controlled first test module oscillation period and 140 are started working, and under its condition that substantially can remove in stress biased, test out soon this V
measthe periodic quantity T of first corresponding oscillation period, for example, can measure the result in first cycle of vibration in 100ns.Therefore, the recovery Effects of the BTI of DUT120 can be overcome substantially at this, and test speed is fast.
Further, step S940, according to the periodic quantity T of first oscillation period, the relation curve based on shown in Fig. 2, can draw V accordingly
meas, this V
measv with reality biasing
meas(the V in step S930
meas) between difference, be by V
stressthe BTI effect of 131 pairs of DUT generations causes, and has also reflected V
stressthe threshold voltage V of DUT120 after 131 biasings
thside-play amount.
Comprehensive known, the BTI effect as shown in Figure 1 proving installation 100 of embodiment is prepared to test and draw fast.Because the coherent signal of first oscillation period of its output is that digital signal is measured, its test accurately; And the periodic quantity T of first oscillation period is that the Flow Control metal-oxide-semiconductor (being also DUT120) based on VCO works in sub-threshold region test and draws, therefore, it can reflect its V enlargedly
ththe variation that is subject to BTI effect, measurement sensitivity is high.Further, by the periodic quantity T of the first oscillation period of VCO output is measured, can be at V
stress131 remove rear real-time synchronization has tested (for example can reach in 100ns), and test speed is fast, and it is little that its test result is affected by the recovery Effects of BTI effect, further realized Measurement accuracy.Meanwhile, whole proving installation is not introduced mimic channel, and integrated circuit is simple.
It should be noted that, while changing DUT120, if the DUT after changing is identical device with changing previous DUT, for example, the device of preparing on same wafer, or the device of preparing on same process production line, can continue to adopt the relation curve shown in Fig. 2, repeating step S920 is the BTI test realizing for the DUT after changing to step S940.Certainly, also V can changed
stressafter size, repeating step S920 carries out different V to step S940
stressbTI effect corresponding to DUT under condition is tested.Further, if the DUT after changing is different components with the DUT before changing, need to again choose with change after the corresponding identical alignment unit of DUT, perform step S910, test out its periodic quantity T and V
measfunction relation curve.
The circuit modular structure schematic diagram of the BTI proving installation providing according to further embodiment of this invention is provided.The BTI proving installation 300 of this embodiment is basic identical with BTI proving installation 100 test philosophies embodiment illustrated in fig. 1.In this embodiment, can test DUT array, as shown in Figure 3, DUT array 320 comprises a plurality of DUT unit, and each unit can be selected with ring oscillator 310 and form VCO.Similarly, ring oscillator 310 is substantially similar with the ring oscillator 110 shown in Fig. 1, it at least comprises a Flow Control phase inverter, its can with selecteed DUT units in series, thereby the frequency of the output signal of the VCO of formation can be controlled by the signal that is biased in the grid end of DUT unit basically.Particularly, BTI proving installation 300 can come according to address signal corresponding selection CeDUT unit by address decoder and storehouse converter as shown in the figure, and therefore, the BTI proving installation 300 of this embodiment can carry out array test easily.Certainly, in DUT array 320, also can comprise alignment unit, when carrying out above-described step S910, can select a certain respective alignment unit to test.
Continue as shown in Figure 3, the analog voltage handover module 330 of BTI proving installation 300 can at least be realized the function of analog voltage handover module 130 as shown in Figure 1 equally.V
meas132 and V
stressswitching between 131 is controlled by signal 190 can equally, and certainly, in this embodiment, signal Str/Rec can also control V
recoverand V
offbetween switching, wherein, V
offduring biasing, other not selected DUT unit are all turn-offed, V
recoverduring biasing, for selected DUT unit, measure its V
ththe process of recovering.
The test sequence that Figure 4 shows that the BTI proving installation based on embodiment illustrated in fig. 3 is related to schematic diagram.Signal based on embodiment illustrated in fig. 4, has reflected the test philosophy of this BTI proving installation.Wherein, Sel signal is test enable signal, when bias stress or after recovery a period of time, starts the V that Sel carries out DUT unit
thmeasurement.VCO
outv
thin test process, the output of the oscillator signal of this VCO, all can vibrate in the whole process that is high level at Sel.Counter_en is first cycle of steering logic sampling VCO, produces the pulse identical with first cycle of VCO, and control counter counting, has so just realized and transferred first cycle of VCO to numerical data.CLK is clock signal, continuously effective.Data_out is counter output, at the effective device counting of Counter_en Output rusults, once Counter_en is invalid, keep result, and to remain to Sel be next time high level always, once Sel for high level can be by steering logic modular unit 341 to its zero clearing.
Above example has mainly illustrated BTI proving installation of the present invention and method of testing thereof.Although only some of them embodiments of the present invention are described, those of ordinary skills should understand, and the present invention can be within not departing from its purport and scope implements with many other forms.Therefore, the example of showing and embodiment are regarded as illustrative and not restrictive, and in the situation that not departing from spirit of the present invention as defined in appended each claim and scope, the present invention may be contained various modifications and replacement.
Claims (13)
1. a bias voltage temperature instability proving installation, is characterized in that, comprise measured device, ring oscillator, analog voltage handover module and first oscillation period test module; Wherein,
Described analog voltage handover module is for carrying out switching controls based on the first control signal to being offset to the first voltage or the second voltage of the grid end of described measured device, shown in the first voltage be the voltage that makes described measured device generation bias voltage temperature instability effect, described second voltage is to make described measured device work in the voltage of subthreshold value;
Described ring oscillator comprises at least one Flow Control phase inverter, described measured device is for controlling the electric current through this Flow Control phase inverter, to such an extent as to described ring oscillator and described measured device form the voltage-controlled voltage controlled oscillator that the frequency of its output signal is at least offset to the grid end of described measured device;
Described first, test module was controlled by described the first control signal synchronously oscillation period, to such an extent as to the grid end of described measured device is switched to biasing during described second voltage, the coherent signal in first cycle of the output signal of described voltage controlled oscillator is by described first test module test output oscillation period.
2. bias voltage temperature instability proving installation as claimed in claim 1, is characterized in that, described measured device is NMOSFET, and described the first voltage is greater than the threshold voltage of described NMOSFET, and described second voltage is less than the threshold voltage of described NMOSFET.
3. bias voltage temperature instability proving installation as claimed in claim 1, it is characterized in that, described measured device is PMOSFET, described the first voltage is the absolute value that negative voltage and its absolute value are greater than the threshold voltage of described PMOSFET, and described second voltage is that negative voltage and its are less than the absolute value of the threshold voltage of described PMOSFET.
4. bias voltage temperature instability proving installation as claimed in claim 1, is characterized in that, described ring oscillator is formed by even number the first phase inverter and the series connection of odd number Flow Control phase inverter substantially.
5. bias voltage temperature instability proving installation as claimed in claim 4, is characterized in that, described Flow Control phase inverter is CMOS phase inverter, and the source/drain terminal of one of them metal-oxide-semiconductor of described measured device and described CMOS phase inverter is connected in series.
6. bias voltage temperature instability proving installation as claimed in claim 1, is characterized in that the periodic quantity that the coherent signal in first cycle of the output signal of described voltage controlled oscillator is first cycle.
7. bias voltage temperature instability proving installation as claimed in claim 6, is characterized in that, described periodic quantity reflects the size of absolute value of difference of the threshold voltage of described second voltage and described measured device.
8. bias voltage temperature instability proving installation as claimed in claim 7, it is characterized in that, at described second voltage fixedly in the situation that, described periodic quantity reflects the threshold voltage variation of described measured device, further to reflect the size of the bias voltage temperature instability effect being occurred in the situation of described the first voltage bias.
9. bias voltage temperature instability proving installation as claimed in claim 1, is characterized in that, described first signal is pulse signal.
10. a method of using device as claimed in claim 1 to carry out the test of bias voltage temperature instability, is characterized in that, comprising:
Calibration steps: before described measured device is tested, to be placed in described device with the corresponding identical alignment unit of described measured device is corresponding, a plurality of different big or small second voltages of grid end upper offset at described alignment unit, and by described first oscillation period test module test the periodic quantity in described first cycle that each second voltage is corresponding, based on described second voltage and described periodic quantity, set up the relation curve forming between described second voltage and the periodic quantity in described first cycle;
Bias voltage temperature instability produces step: when described measured device is tested, by being placed in described device in described measured device, form described voltage controlled oscillator, control described first signal so that the grid end of measured device described in described the first voltage bias;
Bias voltage temperature instability effect testing procedure: control described first signal so that the first voltage of the grid end of the described measured device of setovering switches to second voltage, meanwhile, described first signal makes first test module work oscillation period also test in real time the periodic quantity in first cycle of the output signal of exporting described voltage controlled oscillator; And
Compare calculation procedure: resulting described periodic quantity in the situation of described second voltage biasing is compared to the bias voltage temperature instability effect of calculating to reflect that under described the first voltage bias condition, described measured device occurs in described relation curve.
11. methods as claimed in claim 10, is characterized in that, when described measured device is NMOSFET, described the first voltage is greater than the threshold voltage of described NMOSFET, and described second voltage is less than the threshold voltage of described NMOSFET.
12. methods as claimed in claim 10, it is characterized in that, when described measured device is PMOSFET, described the first voltage is the absolute value that negative voltage and its absolute value are greater than the threshold voltage of described PMOSFET, and described second voltage is that negative voltage and its are less than the absolute value of the threshold voltage of described PMOSFET.
13. methods as claimed in claim 10, it is characterized in that, in described relatively calculation procedure, resulting described periodic quantity in situation based on described second voltage biasing, in described relation curve, correspondence calculates second voltage, the second voltage that this is calculated carries out difference calculating with the second voltage of setovering in bias voltage temperature instability effect testing procedure, with the threshold shift that reflects that described measured device produces in bias voltage temperature instability effect testing procedure.
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| CN104483611A (en) * | 2014-11-24 | 2015-04-01 | 华东师范大学 | Device and method thereof for testing bias temperature instability degrading of MOS (metal oxide semiconductor) device |
| WO2015196772A1 (en) * | 2014-06-25 | 2015-12-30 | 东南大学 | Process corner detection circuit based on self-timing oscillation ring |
| CN107167719A (en) * | 2017-05-09 | 2017-09-15 | 浙江大学 | A kind of supper-fast Bias Temperature instability test system and method applied to semiconductor devices |
| CN107229008A (en) * | 2017-05-22 | 2017-10-03 | 西安电子科技大学 | A kind of measuring method of CMOS inverter MOS threshold voltages |
| US20180364296A1 (en) * | 2015-09-02 | 2018-12-20 | International Business Machines Corporation | Measuring individual device degradation in cmos circuits |
| TWI707220B (en) * | 2019-05-23 | 2020-10-11 | 瑞昱半導體股份有限公司 | Voltage control circuit and voltage control method |
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| WO2015196772A1 (en) * | 2014-06-25 | 2015-12-30 | 东南大学 | Process corner detection circuit based on self-timing oscillation ring |
| US10422830B2 (en) | 2014-06-25 | 2019-09-24 | Southeast University | Process corner detection circuit based on self-timing oscillation ring |
| CN104483611A (en) * | 2014-11-24 | 2015-04-01 | 华东师范大学 | Device and method thereof for testing bias temperature instability degrading of MOS (metal oxide semiconductor) device |
| CN104483611B (en) * | 2014-11-24 | 2017-05-24 | 华东师范大学 | Device and method thereof for testing bias temperature instability degrading of MOS (metal oxide semiconductor) device |
| US20180364296A1 (en) * | 2015-09-02 | 2018-12-20 | International Business Machines Corporation | Measuring individual device degradation in cmos circuits |
| US10901025B2 (en) * | 2015-09-02 | 2021-01-26 | International Business Machines Corporation | Measuring individual device degradation in CMOS circuits |
| CN112147419A (en) * | 2016-03-16 | 2020-12-29 | 英特尔公司 | Techniques to validate a de-embedder for interconnect measurements |
| CN107167719A (en) * | 2017-05-09 | 2017-09-15 | 浙江大学 | A kind of supper-fast Bias Temperature instability test system and method applied to semiconductor devices |
| CN107167719B (en) * | 2017-05-09 | 2019-07-23 | 浙江大学 | A kind of supper-fast Bias Temperature instability test system and method applied to semiconductor devices |
| CN107229008A (en) * | 2017-05-22 | 2017-10-03 | 西安电子科技大学 | A kind of measuring method of CMOS inverter MOS threshold voltages |
| CN107229008B (en) * | 2017-05-22 | 2019-05-21 | 西安电子科技大学 | A kind of measurement method of CMOS inverter MOS threshold voltage |
| TWI707220B (en) * | 2019-05-23 | 2020-10-11 | 瑞昱半導體股份有限公司 | Voltage control circuit and voltage control method |
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